/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 3200 Lo = DAG.getSelect(dl, NVT, isShort, LoS, LoL); in ExpandShiftWithUnknownAmountBit() 3201 Hi = DAG.getSelect(dl, NVT, isZero, InH, in ExpandShiftWithUnknownAmountBit() 3202 DAG.getSelect(dl, NVT, isShort, HiS, HiL)); in ExpandShiftWithUnknownAmountBit() 3217 Lo = DAG.getSelect(dl, NVT, isZero, InL, in ExpandShiftWithUnknownAmountBit() 3218 DAG.getSelect(dl, NVT, isShort, LoS, LoL)); in ExpandShiftWithUnknownAmountBit() 3219 Hi = DAG.getSelect(dl, NVT, isShort, HiS, HiL); in ExpandShiftWithUnknownAmountBit() 3233 Lo = DAG.getSelect(dl, NVT, isZero, InL, in ExpandShiftWithUnknownAmountBit() 3234 DAG.getSelect(dl, NVT, isShort, LoS, LoL)); in ExpandShiftWithUnknownAmountBit() 3235 Hi = DAG.getSelect(dl, NVT, isShort, HiS, HiL); in ExpandShiftWithUnknownAmountBit() 3292 Lo = DAG.getSelect(DL, NVT, HiNeg, LHSL, DAG.getConstant(-1, DL, NVT)); in ExpandIntRes_MINMAX() [all …]
|
H A D | TargetLowering.cpp | 6635 return DAG.getSelect(dl, VT, IsOne, N0, Q); in BuildUDIV() 7531 return DAG.getSelect(DL, VT, Op.getOperand(0), NegLHS, NegRHS); in getNegatedExpression() 7855 Carry = DAG.getSelect(dl, HiLoVT, Carry, DAG.getConstant(1, dl, HiLoVT), in expandDIVREMByConstant() 8306 SDValue FltOfs = DAG.getSelect(dl, SrcVT, Sel, in expandFP_TO_UINT() 8309 SDValue IntOfs = DAG.getSelect(dl, DstVT, Sel, in expandFP_TO_UINT() 8337 Result = DAG.getSelect(dl, DstVT, Sel, True, False); in expandFP_TO_UINT() 8503 MinMax = DAG.getSelect(DL, VT, Compare, LHS, RHS, Flags); in expandFMINIMUM_FMAXIMUM() 8511 MinMax = DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, LHS, RHS, ISD::SETUO), in expandFMINIMUM_FMAXIMUM() 8522 SDValue LCmp = DAG.getSelect( in expandFMINIMUM_FMAXIMUM() 8525 SDValue RCmp = DAG.getSelect( in expandFMINIMUM_FMAXIMUM() [all …]
|
H A D | LegalizeVectorOps.cpp | 898 Results.push_back(DAG.getSelect(SDLoc(Node), Node->getValueType(0), SetCC, in Expand() 1179 Mask = DAG.getSelect(DL, BitTy, Mask, DAG.getAllOnesConstant(DL, BitTy), in ExpandSELECT() 1531 return DAG.getSelect(DL, Node->getValueType(0), FullMask, Op1, Op2); in ExpandVP_MERGE() 1995 ScalarResult = DAG.getSelect(dl, EltVT, ScalarResult, in UnrollStrictFPOp() 2029 Ops[i] = DAG.getSelect(dl, EltVT, Ops[i], DAG.getAllOnesConstant(dl, EltVT), in UnrollVSETCC()
|
H A D | LegalizeDAG.cpp | 1653 return DAG.getSelect(DL, FloatVT, Cond, NegValue, AbsValue); in ExpandFCOPYSIGN() 2760 SDValue InCvt = DAG.getSelect(dl, SrcVT, SignBitTest, Or, Op0); in ExpandLegalINT_TO_FP() 2780 return DAG.getSelect(dl, DestVT, SignBitTest, Slow, Fast); in ExpandLegalINT_TO_FP() 2806 SDValue CstOffset = DAG.getSelect(dl, Zero.getValueType(), in ExpandLegalINT_TO_FP() 4187 DAG.getSelect(dl, VT, Cond, Tmp3, Tmp4, Node->getFlags())); in ExpandNode() 5314 Tmp1 = DAG.getSelect(dl, NVT, Tmp1, Tmp2, Tmp3); in PromoteNode()
|
H A D | DAGCombiner.cpp | 2413 return DAG.getSelect(SDLoc(N), VT, Cond, F0, NewBO); in foldSelectWithIdentityConstant() 2419 return DAG.getSelect(SDLoc(N), VT, Cond, NewBO, F0); in foldSelectWithIdentityConstant() 2523 SDValue SelectOp = DAG.getSelect(DL, VT, Sel.getOperand(0), NewCT, NewCF); in foldBinOpIntoSelect() 4728 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitSDIV() 4828 Sra = DAG.getSelect(DL, VT, IsOneOrAllOnes, N0, Sra); in visitSDIVLike() 4837 SDValue Res = DAG.getSelect(DL, VT, IsNeg, Sub, Sra); in visitSDIVLike() 4872 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitUDIV() 4982 return DAG.getSelect(DL, VT, EqualsNeg1, DAG.getConstant(0, DL, VT), F0); in visitREM() 11612 SDValue SelectOp = DAG.getSelect(DL, VT, F, N2, N1); in visitSELECT() 11741 return DAG.getSelect(DL, VT, UAO.getValue(1), N1, UAO.getValue(0)); in visitSELECT() [all …]
|
H A D | LegalizeVectorTypes.cpp | 622 return DAG.getSelect(SDLoc(N), 629 return DAG.getSelect(SDLoc(N), 4273 return DAG.getSelect(DL, ResVT, ResLoNotEVL, ResLo, 6336 Scalars[i] = DAG.getSelect(dl, EltVT, Scalars[i], in WidenVecRes_STRICT_FSETCC() 7160 Scalars[i] = DAG.getSelect(dl, EltVT, Scalars[i], in WidenVecOp_STRICT_FSETCC()
|
H A D | LegalizeFloatTypes.cpp | 898 return DAG.getSelect(SDLoc(N), in SoftenFloatRes_SELECT() 3297 return DAG.getSelect(SDLoc(N), Op1.getValueType(), N->getOperand(0), Op1, in SoftPromoteHalfRes_SELECT()
|
H A D | SelectionDAG.cpp | 12510 getSelect(dl, OvEltVT, Res.getValue(1), in UnrollVectorOverflowOp()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
H A D | LanaiISelLowering.cpp | 1261 LoBitsForHi = DAG.getSelect(dl, MVT::i32, SetCC, Zero, LoBitsForHi); in LowerSHL_PARTS() 1273 DAG.getSelect(dl, MVT::i32, SetCC, HiForBigShift, HiForNormalShift); in LowerSHL_PARTS() 1278 SDValue Lo = DAG.getSelect( in LowerSHL_PARTS() 1311 Hi = DAG.getSelect(dl, MVT::i32, SetCC, Zero, Hi); in LowerSRL_PARTS() 1314 Lo = DAG.getSelect(dl, MVT::i32, SetCC, Hi, Lo); in LowerSRL_PARTS() 1318 Lo = DAG.getSelect(dl, MVT::i32, ShiftIsZero, Lo, in LowerSRL_PARTS()
|
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | GVN.cpp | 244 static AvailableValue getSelect(SelectInst *Sel, Value *V1, Value *V2) { in getSelect() function 311 static AvailableValueInBlock getSelect(BasicBlock *BB, SelectInst *Sel, in getSelect() function 313 return get(BB, AvailableValue::getSelect(Sel, V1, V2)); in getSelect() 1363 return AvailableValue::getSelect(Sel, V1, V2); in AnalyzeLoadAvailability()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 7678 SDValue Select = DAG.getSelect(dl, MVT::i32, Cond, in LowerBUILD_VECTORvXi1() 7685 SDValue Select = DAG.getSelect(dl, ImmVT, Cond, in LowerBUILD_VECTORvXi1() 10773 DAG.getSelect(DL, BlendVT, DAG.getBuildVector(BlendVT, DL, VSELECTMask), in lowerShuffleAsBlend() 17831 return DAG.getSelect(dl, VT, Mask, LHS, RHS); in LowerVSELECT() 19263 SDValue SignSrc = DAG.getSelect(DL, MVT::v4i64, IsNeg, Sign, Src); in lowerINT_TO_FP_vXi64() 19291 SDValue Cvt = DAG.getSelect(DL, MVT::v4f32, IsNeg, Slow, SignCvt); in lowerINT_TO_FP_vXi64() 19955 SDValue Offset = DAG.getSelect(dl, Zero.getValueType(), SignSet, Four, Zero); in LowerUINT_TO_FP() 20103 SDValue FltOfs = DAG.getSelect(DL, TheVT, Cmp, ThreshVal, in FP_TO_INTHelper() 20266 SDValue SelectedVal = DAG.getSelect(DL, WideVT, In, One, Zero); in LowerZERO_EXTEND_Mask() 24104 SDValue VSel = DAG.getSelect(DL, VecVT, VCmp, VOp1, VOp2); in LowerSELECT() [all …]
|
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1120 DAG.getSelect(dl, WideTy, PredOp, in LowerVSELECT() 2984 Rs[i] = DAG.getSelect(dl, MVT::i32, Ops[i/Rep], S, Z); in LowerBUILD_VECTOR()
|
H A D | HexagonISelLoweringHVX.cpp | 1505 return DAG.getSelect(dl, ResTy, VecV, True, False); in extendHvxVectorPred() 1541 SDValue Sel = DAG.getSelect(dl, VecTy, VecQ, DAG.getBitcast(VecTy, Bytes), in compressHvxPred()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5553 Res = DAG.getSelect(DL, XLenVT, SetCC, EVL, Res); in lowerVPCttzElements() 5879 NewY = DAG.getSelect(DL, VT, XIsNonNan, Y, X); in lowerFMAXIMUM_FMINIMUM() 5885 NewX = DAG.getSelect(DL, VT, YIsNonNan, X, Y); in lowerFMAXIMUM_FMINIMUM() 6942 return DAG.getSelect(DL, VT, Cond, True, False); in LowerOperation() 7690 return DAG.getSelect(DL, VT, Sel.getOperand(0), NewT, NewF); 9008 return DAG.getSelect(DL, XLenVT, Setcc, VL, Res); 9955 return DAG.getSelect( in lowerFPVECREDUCE() 10005 return DAG.getSelect( in lowerVPREDUCE() 15912 DAG.getSelect(DL, OtherOpVT, N->getOperand(0), OtherOp, IdentityOperand); 16000 return DAG.getSelect(D in useInversedSetcc() [all...] |
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 1260 SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS,
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 4337 Narrow = DAG.getSelect(dl, I32, IsNaN, NaN, Narrow); in LowerFP_ROUND() 6208 SDValue Select = DAG.getSelect(DL, VT, Mask, Load, PassThru); in LowerMGATHER() 6386 SDValue Result = DAG.getSelect(DL, VT, Mask, Load, PassThru); in LowerMLOAD() 10192 return DAG.getSelect(DL, VT, Cond, Op0, Op1); in LowerMinMax() 24335 return DAG.getSelect(DL, ResVT, Mask, N->getOperand(1), N->getOperand(2)); in performSelectCombine() 27326 Result = DAG.getSelect(DL, ContainerVT, Mask, Result, OldPassThru); in LowerFixedLengthVectorMLoadToSVE()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIISelLowering.cpp | 10431 SDValue Lo = DAG.getSelect(DL, MVT::i32, Cond, Lo0, Lo1); in LowerSELECT() 10436 SDValue Hi = DAG.getSelect(DL, MVT::i32, Cond, Hi0, Hi1); in LowerSELECT() 11636 return DAG.getSelect(SDLoc(N), MVT::i32, RHS.getOperand(0), in performAndCombine()
|
H A D | AMDGPUISelLowering.cpp | 2475 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2); in LowerFROUNDEVEN()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 5333 return DCI.DAG.getSelect(SDLoc(N), VT, N0->getOperand(0), in PerformADDCombineWithOperands()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelDAGToDAG.cpp | 6643 Res = CurDAG->getSelect(dl, User->getValueType(0), Cond, TrueRes, FalseRes); in foldBoolExts()
|
H A D | PPCISelLowering.cpp | 8487 SDValue FltOfs = DAG.getSelect( in LowerFP_TO_INT() 8499 SDValue IntOfs = DAG.getSelect( in LowerFP_TO_INT()
|
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 4166 DAG.getSelect(dl, VTy, HiIsZero, Lo, DAG.getNOT(dl, Lo, VTy)); in LowerINTRINSIC_WO_CHAIN() 4169 DAG.getSelect(dl, VTy, CheckLo, in LowerINTRINSIC_WO_CHAIN()
|