| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiISelLowering.cpp | 1215 LoBitsForHi = DAG.getSelect(dl, MVT::i32, SetCC, Zero, LoBitsForHi); in LowerSHL_PARTS() 1227 DAG.getSelect(dl, MVT::i32, SetCC, HiForBigShift, HiForNormalShift); in LowerSHL_PARTS() 1232 SDValue Lo = DAG.getSelect( in LowerSHL_PARTS() 1265 Hi = DAG.getSelect(dl, MVT::i32, SetCC, Zero, Hi); in LowerSRL_PARTS() 1268 Lo = DAG.getSelect(dl, MVT::i32, SetCC, Hi, Lo); in LowerSRL_PARTS() 1272 Lo = DAG.getSelect(dl, MVT::i32, ShiftIsZero, Lo, in LowerSRL_PARTS()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeIntegerTypes.cpp | 3383 Lo = DAG.getSelect(dl, NVT, isShort, LoS, LoL); in ExpandShiftWithUnknownAmountBit() 3384 Hi = DAG.getSelect(dl, NVT, isZero, InH, in ExpandShiftWithUnknownAmountBit() 3385 DAG.getSelect(dl, NVT, isShort, HiS, HiL)); in ExpandShiftWithUnknownAmountBit() 3400 Lo = DAG.getSelect(dl, NVT, isZero, InL, in ExpandShiftWithUnknownAmountBit() 3401 DAG.getSelect(dl, NVT, isShort, LoS, LoL)); in ExpandShiftWithUnknownAmountBit() 3402 Hi = DAG.getSelect(dl, NVT, isShort, HiS, HiL); in ExpandShiftWithUnknownAmountBit() 3416 Lo = DAG.getSelect(dl, NVT, isZero, InL, in ExpandShiftWithUnknownAmountBit() 3417 DAG.getSelect(dl, NVT, isShort, LoS, LoL)); in ExpandShiftWithUnknownAmountBit() 3418 Hi = DAG.getSelect(dl, NVT, isShort, HiS, HiL); in ExpandShiftWithUnknownAmountBit() 3489 Lo = DAG.getSelect(DL, NVT, HiNeg, LHSL, DAG.getAllOnesConstant(DL, NVT)); in ExpandIntRes_MINMAX() [all …]
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| H A D | TargetLowering.cpp | 6861 return DAG.getSelect(dl, VT, IsOne, N0, Q); in BuildUDIV() 7750 return DAG.getSelect(DL, VT, Op.getOperand(0), NegLHS, NegRHS); in getNegatedExpression() 8074 Carry = DAG.getSelect(dl, HiLoVT, Carry, DAG.getConstant(1, dl, HiLoVT), in expandDIVREMByConstant() 8524 SDValue FltOfs = DAG.getSelect(dl, SrcVT, Sel, in expandFP_TO_UINT() 8527 SDValue IntOfs = DAG.getSelect(dl, DstVT, Sel, in expandFP_TO_UINT() 8555 Result = DAG.getSelect(dl, DstVT, Sel, True, False); in expandFP_TO_UINT() 8736 MinMax = DAG.getSelect(DL, VT, Compare, LHS, RHS, Flags); in expandFMINIMUM_FMAXIMUM() 8744 MinMax = DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, LHS, RHS, ISD::SETUO), in expandFMINIMUM_FMAXIMUM() 8755 SDValue LCmp = DAG.getSelect( in expandFMINIMUM_FMAXIMUM() 8758 SDValue RCmp = DAG.getSelect( in expandFMINIMUM_FMAXIMUM() [all …]
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| H A D | LegalizeVectorOps.cpp | 1007 Results.push_back(DAG.getSelect(SDLoc(Node), Node->getValueType(0), SetCC, in Expand() 1361 Mask = DAG.getSelect(DL, BitTy, Mask, DAG.getAllOnesConstant(DL, BitTy), in ExpandSELECT() 1701 return DAG.getSelect(DL, Node->getValueType(0), FullMask, Op1, Op2); in ExpandVP_MERGE() 2323 ScalarResult = DAG.getSelect(dl, EltVT, ScalarResult, in UnrollStrictFPOp() 2358 Ops[i] = DAG.getSelect(dl, EltVT, Ops[i], in UnrollVSETCC()
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| H A D | DAGCombiner.cpp | 2499 return DAG.getSelect(SDLoc(N), VT, Cond, F0, NewBO); in foldSelectWithIdentityConstant() 2507 return DAG.getSelect(SDLoc(N), VT, Cond, NewBO, F0); in foldSelectWithIdentityConstant() 2609 return DAG.getSelect(DL, VT, Sel.getOperand(0), NewCT, NewCF, BO->getFlags()); in foldBinOpIntoSelect() 5058 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitSDIV() 5162 Sra = DAG.getSelect(DL, VT, IsOneOrAllOnes, N0, Sra); in visitSDIVLike() 5171 SDValue Res = DAG.getSelect(DL, VT, IsNeg, Sub, Sra); in visitSDIVLike() 5206 return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ), in visitUDIV() 5326 return DAG.getSelect(DL, VT, EqualsNeg1, DAG.getConstant(0, DL, VT), F0); in visitREM() 12193 return DAG.getSelect(DL, VT, F, N2, N1, Flags); in visitSELECT() 12337 return DAG.getSelect(DL, VT, UAO.getValue(1), N1, UAO.getValue(0)); in visitSELECT() [all …]
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| H A D | LegalizeDAG.cpp | 1720 return DAG.getSelect(DL, FloatVT, Cond, NegValue, AbsValue); in ExpandFCOPYSIGN() 2787 SDValue InCvt = DAG.getSelect(dl, SrcVT, SignBitTest, Or, Op0); in ExpandLegalINT_TO_FP() 2807 return DAG.getSelect(dl, DestVT, SignBitTest, Slow, Fast); in ExpandLegalINT_TO_FP() 2833 SDValue CstOffset = DAG.getSelect(dl, Zero.getValueType(), in ExpandLegalINT_TO_FP() 4325 DAG.getSelect(dl, VT, Cond, Tmp3, Tmp4, Node->getFlags())); in ExpandNode() 5525 Tmp1 = DAG.getSelect(dl, NVT, Tmp1, Tmp2, Tmp3); in PromoteNode()
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| H A D | LegalizeVectorTypes.cpp | 626 return DAG.getSelect(SDLoc(N), in ScalarizeVecRes_VSELECT() 633 return DAG.getSelect(SDLoc(N), in ScalarizeVecRes_SELECT() 4574 return DAG.getSelect(DL, ResVT, ResLoNotEVL, ResLo, in SplitVecOp_VP_CttzElements() 6778 Scalars[i] = DAG.getSelect(dl, EltVT, Scalars[i], in WidenVecRes_STRICT_FSETCC() 7634 Scalars[i] = DAG.getSelect(dl, EltVT, Scalars[i], in WidenVecOp_STRICT_FSETCC()
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| H A D | LegalizeFloatTypes.cpp | 1040 return DAG.getSelect(SDLoc(N), in SoftenFloatRes_SELECT() 3622 return DAG.getSelect(SDLoc(N), Op1.getValueType(), N->getOperand(0), Op1, in SoftPromoteHalfRes_SELECT()
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| H A D | SelectionDAGBuilder.cpp | 6491 Result = DAG.getSelect(sdl, ResVT, AnyActive, Result, PassThru); in visitVectorExtractLastActive()
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| H A D | SelectionDAG.cpp | 13088 getSelect(dl, OvEltVT, Res.getValue(1), in UnrollVectorOverflowOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
| H A D | GVN.cpp | 250 static AvailableValue getSelect(SelectInst *Sel, Value *V1, Value *V2) { in getSelect() function 316 static AvailableValueInBlock getSelect(BasicBlock *BB, SelectInst *Sel, in getSelect() function 318 return get(BB, AvailableValue::getSelect(Sel, V1, V2)); in getSelect() 1458 return AvailableValue::getSelect(Sel, V1, V2); in AnalyzeLoadAvailability()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 8042 SDValue Select = DAG.getSelect(dl, MVT::i32, Cond, in LowerBUILD_VECTORvXi1() 8049 SDValue Select = DAG.getSelect(dl, ImmVT, Cond, in LowerBUILD_VECTORvXi1() 11260 DAG.getSelect(DL, BlendVT, DAG.getBuildVector(BlendVT, DL, VSELECTMask), in lowerShuffleAsBlend() 18512 return DAG.getSelect(dl, VT, Mask, LHS, RHS); in LowerVSELECT() 19968 SDValue SignSrc = DAG.getSelect(DL, MVT::v4i64, IsNeg, Sign, Src); in lowerINT_TO_FP_vXi64() 19996 SDValue Cvt = DAG.getSelect(DL, MVT::v4f32, IsNeg, Slow, SignCvt); in lowerINT_TO_FP_vXi64() 20670 SDValue Offset = DAG.getSelect(dl, Zero.getValueType(), SignSet, Four, Zero); in LowerUINT_TO_FP() 20819 SDValue FltOfs = DAG.getSelect(DL, TheVT, Cmp, ThreshVal, in FP_TO_INTHelper() 20981 SDValue SelectedVal = DAG.getSelect(DL, WideVT, In, One, Zero); in LowerZERO_EXTEND_Mask() 25007 SDValue VSel = DAG.getSelect(DL, VecVT, VCmp, VOp1, VOp2); in LowerSELECT() [all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 1189 DAG.getSelect(dl, WideTy, PredOp, in LowerVSELECT() 3006 Rs[i] = DAG.getSelect(dl, MVT::i32, Ops[i/Rep], S, Z); in LowerBUILD_VECTOR()
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| H A D | HexagonISelLoweringHVX.cpp | 1520 return DAG.getSelect(dl, ResTy, VecV, True, False); in extendHvxVectorPred() 1556 SDValue Sel = DAG.getSelect(dl, VecTy, VecQ, DAG.getBitcast(VecTy, Bytes), in compressHvxPred()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXISelLowering.cpp | 2840 return DAG.getSelect(DL, Ty, IsInf, X, Sub); in lowerFREM() 2862 SDValue Select = DAG.getSelect(DL, VT, Cond, TrueVal, FalseVal); in lowerSELECT() 4872 return DCI.DAG.getSelect(SDLoc(N), VT, N0->getOperand(0), in PerformADDCombineWithOperands()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1338 SDValue getSelect(const SDLoc &DL, EVT VT, SDValue Cond, SDValue LHS,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelLowering.cpp | 6507 Res = DAG.getSelect(DL, XLenVT, SetCC, EVL, Res); in lowerVPCttzElements() 6802 NewY = DAG.getSelect(DL, VT, XIsNonNan, Y, X); in lowerFMAXIMUM_FMINIMUM() 6808 NewX = DAG.getSelect(DL, VT, YIsNonNan, X, Y); in lowerFMAXIMUM_FMINIMUM() 8058 return DAG.getSelect(DL, VT, Cond, True, False); in LowerOperation() 9061 return DAG.getSelect(DL, VT, Sel.getOperand(0), NewT, NewF); in foldBinOpIntoSelectIfProfitable() 10525 return DAG.getSelect(DL, XLenVT, Setcc, VL, Res); in lowerCttzElts() 11341 return DAG.getSelect( in lowerFPVECREDUCE() 11390 return DAG.getSelect( in lowerVPREDUCE() 18473 DAG.getSelect(DL, OtherOpVT, N->getOperand(0), OtherOp, IdentityOperand); in tryFoldSelectIntoOp() 18561 return DAG.getSelect(DL, VT, in useInversedSetcc()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchISelLowering.cpp | 692 return DAG.getSelect(DL, VT, Sel.getOperand(0), NewT, NewF); in foldBinOpIntoSelectIfProfitable() 4561 return DAG.getSelect( in signExtendBitcastSrcVector()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64ISelLowering.cpp | 4414 Narrow = DAG.getSelect(DL, I32, IsNaN, NaN, Narrow); in LowerFP_ROUND() 4465 Narrow = DAG.getSelect(DL, I32, IsNaN, NaN, Narrow); in LowerFP_ROUND() 6503 SDValue Select = DAG.getSelect(DL, VT, Mask, Load, PassThru); in LowerMGATHER() 6681 SDValue Result = DAG.getSelect(DL, VT, Mask, Load, PassThru); in LowerMLOAD() 10878 return DAG.getSelect(DL, VT, Cond, Op0, Op1); in LowerMinMax() 25738 return DAG.getSelect(DL, ResVT, Mask, N->getOperand(1), N->getOperand(2)); in performSelectCombine() 28940 Result = DAG.getSelect(DL, ContainerVT, Mask, Result, OldPassThru); in LowerFixedLengthVectorMLoadToSVE()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 11088 SDValue Lo = DAG.getSelect(DL, MVT::i32, Cond, Lo0, Lo1); in LowerSELECT() 11093 SDValue Hi = DAG.getSelect(DL, MVT::i32, Cond, Hi0, Hi1); in LowerSELECT() 12406 return DAG.getSelect(SDLoc(N), MVT::i32, RHS.getOperand(0), LHS, in performAndCombine()
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| H A D | AMDGPUISelLowering.cpp | 2532 return DAG.getSelect(SL, MVT::f64, Cond, Src, Tmp2); in LowerFROUNDEVEN()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelDAGToDAG.cpp | 6656 Res = CurDAG->getSelect(dl, User->getValueType(0), Cond, TrueRes, FalseRes); in foldBoolExts()
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| H A D | PPCISelLowering.cpp | 8553 SDValue FltOfs = DAG.getSelect( in LowerFP_TO_INT() 8565 SDValue IntOfs = DAG.getSelect( in LowerFP_TO_INT()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMISelLowering.cpp | 4236 DAG.getSelect(dl, VTy, HiIsZero, Lo, DAG.getNOT(dl, Lo, VTy)); in LowerINTRINSIC_WO_CHAIN() 4239 DAG.getSelect(dl, VTy, CheckLo, in LowerINTRINSIC_WO_CHAIN()
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