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Searched refs:getSchedClassDesc (Results 1 – 12 of 12) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCSchedule.cpp61 const MCSchedClassDesc &SCDesc = *getSchedClassDesc(SchedClass); in computeInstrLatency()
85 SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
127 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
137 SCDesc = getSchedClassDesc(SchedClass); in getReciprocalThroughput()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64StorePairSuppress.cpp86 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldAddSTPToBlock()
90 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx2); in shouldAddSTPToBlock()
H A DAArch64SIMDInstrOpt.cpp229 SchedModel.getMCSchedModel()->getSchedClassDesc(SCIdx); in shouldReplaceInst()
241 SCDescRepl = SchedModel.getMCSchedModel()->getSchedClassDesc( in shouldReplaceInst()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetSchedule.cpp121 const MCSchedClassDesc *SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
132 SCDesc = SchedModel.getSchedClassDesc(SchedClass); in resolveSchedClass()
326 const MCSchedClassDesc &SCDesc = *SchedModel.getSchedClassDesc(SchedClass); in computeReciprocalThroughput()
H A DMachineCombiner.cpp419 const MCSchedClassDesc *SC = SchedModel.getSchedClassDesc(Idx); in instr2instrSC()
H A DMachinePipeliner.cpp1401 STI->getSchedModel().getSchedClassDesc(SchedClass); in minFuncUnits()
1444 STI->getSchedModel().getSchedClassDesc(SchedClass); in calcCriticalResources()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCSchedule.h366 const MCSchedClassDesc *getSchedClassDesc(unsigned SchedClassIdx) const { in getSchedClassDesc() function
466 const MCSchedClassDesc *SCDesc = getSchedClassDesc(SchedClass); in computeInstrLatency()
/freebsd/contrib/llvm-project/llvm/lib/MCA/
H A DInstrBuilder.cpp272 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID); in populateWrites()
547 while (SchedClassID && SM.getSchedClassDesc(SchedClassID)->isVariant()) in getVariantSchedClassID()
573 bool IsVariant = SM.getSchedClassDesc(SchedClassID)->isVariant(); in createInstrDescImpl()
587 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID); in createInstrDescImpl()
704 *STI.getSchedModel().getSchedClassDesc(D.SchedClassID); in createInstruction()
/freebsd/contrib/llvm-project/llvm/tools/llvm-mca/Views/
H A DInstructionInfoView.cpp207 while (SchedClassID && SM.getSchedClassDesc(SchedClassID)->isVariant()) in collectData()
211 const MCSchedClassDesc &SCDesc = *SM.getSchedClassDesc(SchedClassID); in collectData()
/freebsd/contrib/llvm-project/llvm/lib/MCA/HardwareUnits/
H A DRegisterFile.cpp516 const MCSchedClassDesc *SC = SM.getSchedClassDesc(RD.SchedClassID); in collectWrites()
584 const MCSchedClassDesc *SC = SM.getSchedClassDesc(RD.SchedClassID); in checkRAWHazards()
647 const MCSchedClassDesc *SC = SM.getSchedClassDesc(RD.SchedClassID); in addRegisterRead()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FixupInstTuning.cpp89 *ST, *(SM->getSchedClassDesc(TII->get(Opcode).getSchedClass()))); in processInstruction()
95 *ST, *(SM->getSchedClassDesc(TII->get(Opcode).getSchedClass()))); in processInstruction()
H A DX86FixupVectorConstants.cpp364 auto *OldDesc = SM->getSchedClassDesc(TII->get(Opc).getSchedClass()); in processInstruction()
365 auto *NewDesc = SM->getSchedClassDesc(TII->get(NewOpc).getSchedClass()); in processInstruction()