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Searched refs:getRelaxedOpcode (Results 1 – 6 of 6) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/MCTargetDesc/
H A DM68kAsmBackend.cpp141 static unsigned getRelaxedOpcode(const MCInst &Inst) { in getRelaxedOpcode() function
189 unsigned RelaxedOp = getRelaxedOpcode(Inst); in relaxInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/
H A DARMAsmBackend.h52 unsigned getRelaxedOpcode(unsigned Op, const MCSubtargetInfo &STI) const;
H A DARMAsmBackend.cpp223 unsigned ARMAsmBackend::getRelaxedOpcode(unsigned Op, in getRelaxedOpcode() function in ARMAsmBackend
248 if (getRelaxedOpcode(Inst.getOpcode(), STI) != Inst.getOpcode()) in mayNeedRelaxation()
346 unsigned RelaxedOp = getRelaxedOpcode(Inst.getOpcode(), STI); in relaxInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/MCTargetDesc/
H A DRISCVAsmBackend.h87 unsigned getRelaxedOpcode(unsigned Op) const;
H A DRISCVAsmBackend.cpp195 Res.setOpcode(getRelaxedOpcode(Inst.getOpcode())); in relaxInstruction()
347 unsigned RISCVAsmBackend::getRelaxedOpcode(unsigned Op) const { in getRelaxedOpcode() function in RISCVAsmBackend
375 return getRelaxedOpcode(Inst.getOpcode()) != Inst.getOpcode(); in mayNeedRelaxation()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/MCTargetDesc/
H A DX86AsmBackend.cpp229 static unsigned getRelaxedOpcode(const MCInst &MI, bool Is16BitMode) { in getRelaxedOpcode() function
755 unsigned RelaxedOp = getRelaxedOpcode(Inst, Is16BitMode); in relaxInstruction()