| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| H A D | ARMMCCodeEmitter.cpp | 554 unsigned RegNo = CTX.getRegisterInfo()->getEncodingValue(Reg); in getMachineOpValue()
594 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in EncodeAddrModeOpValues()
929 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(MO1.getReg()); in getThumbAddrModeRegRegOpValue()
930 unsigned Rm = CTX.getRegisterInfo()->getEncodingValue(MO2.getReg()); in getThumbAddrModeRegRegOpValue()
988 Reg = CTX.getRegisterInfo()->getEncodingValue(MO.getReg()); in getAddrModeImm12OpValue()
994 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getAddrModeImm12OpValue()
1065 unsigned Rn = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeRQOpValue()
1066 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M1.getReg()); in getMveAddrModeRQOpValue()
1085 unsigned Qm = CTX.getRegisterInfo()->getEncodingValue(M0.getReg()); in getMveAddrModeQOpValue()
1119 Reg = CTX.getRegisterInfo()->getEncodingValue(ARM::PC); // Rn is PC. in getT2AddrModeImm8s4OpValue()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | TargetFrameLoweringImpl.cpp | 52 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
85 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in getCalleeSaves()
99 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in determineCalleeSaves()
155 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in allocateScavengingFrameIndexesNearIncomingSP()
183 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getDwarfFrameBase()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
| H A D | XCoreMachineFunctionInfo.cpp | 46 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createLRSpillSlot()
64 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createFPSpillSlot()
77 const TargetRegisterInfo &TRI = *MF.getSubtarget().getRegisterInfo(); in createEHSpillSlot()
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| H A D | XCoreSubtarget.h | 59 const TargetRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
60 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsFrameLowering.cpp | 89 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasFPImpl()
98 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
110 const TargetRegisterInfo &TRI = *STI.getRegisterInfo(); in estimateStackSize()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXPeephole.cpp | 92 MF.getSubtarget<NVPTXSubtarget>().getRegisterInfo(); in isCVTAToLocalCombinationCandidate()
111 MF.getSubtarget<NVPTXSubtarget>().getRegisterInfo(); in CombineCVTAToLocal()
148 MF.getSubtarget<NVPTXSubtarget>().getRegisterInfo(); in runOnMachineFunction()
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| H A D | NVPTXSubtarget.h | 67 const NVPTXRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
68 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/DirectX/ |
| H A D | DirectXSubtarget.h | 53 const DirectXRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
54 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/ |
| H A D | ARCSubtarget.h | 59 const ARCRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
60 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiSubtarget.h | 54 const LanaiRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
55 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VESubtarget.h | 55 const VERegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
56 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
| H A D | MSP430Subtarget.h | 68 const MSP430RegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
69 return &getInstrInfo()->getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcSubtarget.h | 61 const SparcRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
62 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/ |
| H A D | XtensaSubtarget.h | 56 const XtensaRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
57 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
| H A D | LoongArchFrameLowering.cpp | 35 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in hasFPImpl()
45 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
143 const LoongArchRegisterInfo *RI = STI.getRegisterInfo(); in processFunctionBeforeFrameFinalized()
189 const LoongArchRegisterInfo *RI = STI.getRegisterInfo(); in emitPrologue()
313 const LoongArchRegisterInfo *RI = STI.getRegisterInfo(); in emitEpilogue()
462 const TargetRegisterInfo *RI = MF.getSubtarget().getRegisterInfo(); in getFrameIndexReference()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/ |
| H A D | WebAssemblySubtarget.h | 87 const WebAssemblyRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
88 return &getInstrInfo()->getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFSubtarget.h | 110 const BPFRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
111 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
| H A D | AVRSubtarget.h | 52 const AVRRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
53 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZSubtarget.h | 77 const SystemZRegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
78 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SILowerI1Copies.h | 82 return TII->getRegisterInfo().isSGPRReg(*MRI, Reg) && in isLaneMaskReg()
83 TII->getRegisterInfo().getRegSizeInBits(Reg, *MRI) == in isLaneMaskReg()
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| H A D | R600Subtarget.h | 61 const R600RegisterInfo *getRegisterInfo() const override { in getRegisterInfo() function
62 return &InstrInfo.getRegisterInfo(); in getRegisterInfo()
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| H A D | SIFrameLowering.cpp | 80 const SIRegisterInfo *TRI = ST.getRegisterInfo(); in getVGPRSpillLaneOrTempRegister()
182 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in buildGitPtr()
388 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionFlatScratchInit()
543 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in getEntryFunctionReservedScratchRsrcReg()
613 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionPrologue()
783 const SIRegisterInfo *TRI = &TII->getRegisterInfo(); in emitEntryFunctionScratchRsrcRegSetup()
944 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in buildScratchExecCopy()
975 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitCSRSpillStores()
1061 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitCSRSpillRestores()
1133 const SIRegisterInfo &TRI = TII->getRegisterInfo(); in emitPrologue()
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| /freebsd/contrib/llvm-project/llvm/lib/MC/ |
| H A D | MCInst.cpp | 29 if (Ctx && Ctx->getRegisterInfo()) in print()
30 OS << Ctx->getRegisterInfo()->getName(getReg()); in print()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/MCTargetDesc/ |
| H A D | CSKYMCCodeEmitter.cpp | 422 return Ctx.getRegisterInfo()->getEncodingValue(MO.getReg()); in getMachineOpValue()
441 unsigned Imm = Ctx.getRegisterInfo()->getEncodingValue(Rz) - in getRegSeqImmOpValue()
442 Ctx.getRegisterInfo()->getEncodingValue(Ry); in getRegSeqImmOpValue()
444 return ((Ctx.getRegisterInfo()->getEncodingValue(Ry) << 5) | Imm); in getRegSeqImmOpValue()
452 Ctx.getRegisterInfo()->getEncodingValue(MI.getOperand(Op).getReg()); in getRegisterSeqOpValue()
454 Ctx.getRegisterInfo()->getEncodingValue(MI.getOperand(Op + 1).getReg()); in getRegisterSeqOpValue()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVFrameLowering.cpp | 111 const llvm::RISCVRegisterInfo *TRI = STI.getRegisterInfo(); in emitSCSPrologue()
237 *MF.getSubtarget<RISCVSubtarget>().getRegisterInfo(); in createSiFivePreemptibleInterruptFrameEntries()
273 &RISCV::GPRRegClass, STI.getRegisterInfo(), in emitSiFiveCLICPreemptibleSaves()
277 &RISCV::GPRRegClass, STI.getRegisterInfo(), in emitSiFiveCLICPreemptibleSaves()
341 &RISCV::GPRRegClass, STI.getRegisterInfo(), in emitSiFiveCLICPreemptibleRestores()
345 &RISCV::GPRRegClass, STI.getRegisterInfo(), in emitSiFiveCLICPreemptibleRestores()
465 const TargetRegisterInfo *RegInfo = MF.getSubtarget().getRegisterInfo(); in hasFPImpl()
475 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in hasBP()
512 const TargetRegisterInfo *TRI = STI.getRegisterInfo(); in determineFrameLayout()
744 const RISCVRegisterInfo *RI = STI.getRegisterInfo(); in allocateStack()
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