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Searched refs:getRegister (Results 1 – 25 of 103) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/DWARFCFIChecker/
H A DDWARFCFIState.cpp70 CFIP.addInstruction(dwarf::DW_CFA_same_value, Directive.getRegister()); in convert()
91 CFIP.addInstruction(dwarf::DW_CFA_offset, Directive.getRegister(), in convert()
96 Directive.getRegister()); in convert()
100 Directive.getRegister()); in convert()
106 CFIP.addInstruction(dwarf::DW_CFA_def_cfa, Directive.getRegister(), in convert()
114 CFIP.addInstruction(dwarf::DW_CFA_offset, Directive.getRegister(), in convert()
139 CFIP.addInstruction(dwarf::DW_CFA_undefined, Directive.getRegister()); in convert()
142 CFIP.addInstruction(dwarf::DW_CFA_register, Directive.getRegister(), in convert()
161 CFIP.addInstruction(dwarf::DW_CFA_val_offset, Directive.getRegister(), in convert()
H A DRegisters.h35 MCPhysReg Reg = RegClass.getRegister(I); in getSuperRegs()
H A DDWARFCFIAnalysis.cpp53 return CFARegOffsetInfo(CFALocation.getRegister(), CFALocation.getOffset()); in getCFARegOffsetInfo()
78 return {Loc.getRegister()}; in getUnwindRuleRegSet()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DAsmPrinterDwarf.cpp217 OutStreamer->emitCFIDefCfa(Inst.getRegister(), Inst.getOffset(), Loc); in emitCFIInstruction()
220 OutStreamer->emitCFIDefCfaRegister(Inst.getRegister(), Loc); in emitCFIInstruction()
223 OutStreamer->emitCFILLVMDefAspaceCfa(Inst.getRegister(), Inst.getOffset(), in emitCFIInstruction()
227 OutStreamer->emitCFIOffset(Inst.getRegister(), Inst.getOffset(), Loc); in emitCFIInstruction()
230 OutStreamer->emitCFIRegister(Inst.getRegister(), Inst.getRegister2(), Loc); in emitCFIInstruction()
242 OutStreamer->emitCFISameValue(Inst.getRegister(), Loc); in emitCFIInstruction()
252 OutStreamer->emitCFIRestore(Inst.getRegister(), Loc); in emitCFIInstruction()
255 OutStreamer->emitCFIUndefined(Inst.getRegister(), Loc); in emitCFIInstruction()
264 OutStreamer->emitCFIValOffset(Inst.getRegister(), Inst.getOffset(), Loc); in emitCFIInstruction()
/freebsd/contrib/llvm-project/libunwind/src/
H A DUnwindCursor.hpp612 _msContext.Rax = r.getRegister(UNW_X86_64_RAX); in UnwindCursor()
613 _msContext.Rcx = r.getRegister(UNW_X86_64_RCX); in UnwindCursor()
614 _msContext.Rdx = r.getRegister(UNW_X86_64_RDX); in UnwindCursor()
615 _msContext.Rbx = r.getRegister(UNW_X86_64_RBX); in UnwindCursor()
616 _msContext.Rsp = r.getRegister(UNW_X86_64_RSP); in UnwindCursor()
617 _msContext.Rbp = r.getRegister(UNW_X86_64_RBP); in UnwindCursor()
618 _msContext.Rsi = r.getRegister(UNW_X86_64_RSI); in UnwindCursor()
619 _msContext.Rdi = r.getRegister(UNW_X86_64_RDI); in UnwindCursor()
620 _msContext.R8 = r.getRegister(UNW_X86_64_R8); in UnwindCursor()
621 _msContext.R9 = r.getRegister(UNW_X86_64_R9); in UnwindCursor()
[all …]
H A DRegisters.hpp64 uint32_t getRegister(int num) const;
141 inline uint32_t Registers_x86::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_x86
282 uint64_t getRegister(int num) const;
369 inline uint64_t Registers_x86_64::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_x86_64
601 uint32_t getRegister(int num) const;
727 inline uint32_t Registers_ppc::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_ppc
1173 uint64_t getRegister(int num) const;
1293 inline uint64_t Registers_ppc64::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_ppc64
1831 uint64_t getRegister(int num) const;
1903 inline uint64_t Registers_arm64::getRegister(int regNum) const { in getRegister() function in libunwind::Registers_arm64
[all …]
H A DDwarfInstructions.hpp68 return (pint_t)((sint_t)registers.getRegister((int)prolog.cfaRegister) + in getCFA()
98 return (pint_t)addressSpace.getRegister(cfa + (pint_t)savedReg.value); in getSavedRegister()
105 return (pint_t)addressSpace.getRegister(evaluateExpression( in getSavedRegister()
113 return registers.getRegister((int)savedReg.value); in getSavedRegister()
378 pint_t sp = newRegisters.getRegister(UNW_REG_SP); in stepWithDwarf()
838 *(++sp) = registers.getRegister((int)reg); in evaluateExpression()
845 *(++sp) = registers.getRegister((int)reg); in evaluateExpression()
884 svalue += static_cast<sint_t>(registers.getRegister((int)reg)); in evaluateExpression()
893 svalue += static_cast<sint_t>(registers.getRegister((int)reg)); in evaluateExpression()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp874 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode2OffsetImmPre()
893 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode2OffsetImm()
927 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode3()
943 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode3()
972 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode3Offset()
1091 Offset = CurDAG->getRegister(0, MVT::i32); in SelectAddrMode6Offset()
1643 CurDAG->getRegister(0, MVT::i32), Chain }; in tryARMIndexedLoad()
1653 CurDAG->getRegister(0, MVT::i32), Chain }; in tryARMIndexedLoad()
1684 CurDAG->getRegister(0, MVT::i32), Chain }; in tryT1IndexedLoad()
1732 CurDAG->getRegister(0, MVT::i32), Chain }; in tryT2IndexedLoad()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.cpp179 AMDGPU::VGPR_32RegClass.getRegister(ST.getMaxNumVGPRs(F) - 1); in SIMachineFunctionInfo()
202 return ArgInfo.PrivateSegmentBuffer.getRegister(); in addPrivateSegmentBuffer()
209 return ArgInfo.DispatchPtr.getRegister(); in addDispatchPtr()
216 return ArgInfo.QueuePtr.getRegister(); in addQueuePtr()
224 return ArgInfo.KernargSegmentPtr.getRegister(); in addKernargSegmentPtr()
231 return ArgInfo.DispatchID.getRegister(); in addDispatchID()
238 return ArgInfo.FlatScratchInit.getRegister(); in addFlatScratchInit()
244 return ArgInfo.PrivateSegmentSize.getRegister(); in addPrivateSegmentSize()
251 return ArgInfo.ImplicitBufferPtr.getRegister(); in addImplicitBufferPtr()
257 return ArgInfo.LDSKernelId.getRegister(); in addLDSKernelId()
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H A DSIMachineFunctionInfo.h398 const MCRegister FirstVGPRBlock = AMDGPU::VReg_1024RegClass.getRegister(0);
865 return ArgInfo.WorkGroupIDX.getRegister();
871 return ArgInfo.WorkGroupIDY.getRegister();
877 return ArgInfo.WorkGroupIDZ.getRegister();
883 return ArgInfo.WorkGroupInfo.getRegister();
905 return ArgInfo.PrivateSegmentWaveByteOffset.getRegister();
963 return Arg ? Arg->getRegister() : MCRegister();
989 return ArgInfo.PrivateSegmentWaveByteOffset.getRegister();
1030 return ArgInfo.QueuePtr.getRegister();
1034 return ArgInfo.ImplicitBufferPtr.getRegister();
H A DR600InstrInfo.cpp1005 getIndirectAddrRegClass()->getRegister(Address)); in expandPostRAPseudo()
1018 buildMovInstr(MBB, MI, getIndirectAddrRegClass()->getRegister(Address), in expandPostRAPseudo()
1066 R600::R600_TReg32RegClass.getRegister((4 * Index) + Chan); in reserveIndirectRegisters()
1091 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectWrite()
1092 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectWrite()
1093 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectWrite()
1094 case 3: AddrReg = R600::R600_Addr_WRegClass.getRegister(Address); break; in buildIndirectWrite()
1123 case 0: AddrReg = R600::R600_AddrRegClass.getRegister(Address); break; in buildIndirectRead()
1124 case 1: AddrReg = R600::R600_Addr_YRegClass.getRegister(Address); break; in buildIndirectRead()
1125 case 2: AddrReg = R600::R600_Addr_ZRegClass.getRegister(Address); break; in buildIndirectRead()
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H A DR600ISelDAGToDAG.cpp148 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32); in SelectADDRIndirect()
152 Base = CurDAG->getRegister(R600::INDIRECT_BASE_ADDR, MVT::i32); in SelectADDRIndirect()
H A DR600EmitClauseMarkers.cpp157 Op->setReg(R600::R600_KC0RegClass.getRegister(UsedKCache[j].second)); in SubstituteKCacheBank()
160 Op->setReg(R600::R600_KC1RegClass.getRegister(UsedKCache[j].second)); in SubstituteKCacheBank()
H A DR600ExpandSpecialInstrs.cpp133 R600::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan); in runOnMachineFunction()
233 DstReg = R600::R600_TReg32RegClass.getRegister((DstBase * 4) + Chan); in runOnMachineFunction()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCFIInstrInserter.cpp201 SetRegister = CFI.getRegister(); in calculateOutgoingCFAInfo()
210 SetRegister = CFI.getRegister(); in calculateOutgoingCFAInfo()
223 CSRRestored.set(CFI.getRegister()); in calculateOutgoingCFAInfo()
270 auto It = CSRLocMap.find(CFI.getRegister()); in calculateOutgoingCFAInfo()
273 {CFI.getRegister(), CSRSavedLocation(CSRReg, CSROffset)}); in calculateOutgoingCFAInfo()
277 CSRSaved.set(CFI.getRegister()); in calculateOutgoingCFAInfo()
H A DExecutionDomainFix.cpp248 LLVM_DEBUG(dbgs() << printReg(RC->getRegister(rx), TRI) << ":\t" << *MI); in processDefs()
340 const int Def = RDA->getReachingDef(mi, RC->getRegister(rx)); in visitSoftInstr()
342 return RDA->getReachingDef(mi, RC->getRegister(I)) <= Def; in visitSoftInstr()
446 for (MCRegAliasIterator AI(RC->getRegister(i), TRI, true); AI.isValid(); in runOnMachineFunction()
H A DMachineOperand.cpp680 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
696 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
703 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
715 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
722 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
730 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
743 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
761 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
767 printCFIRegister(CFI.getRegister(), OS, TRI); in printCFI()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelDAGToDAG.cpp81 return CurDAG->getRegister(GlobalBaseReg, in INITIALIZE_PASS()
151 R2 = CurDAG->getRegister(SP::G0, TLI->getPointerTy(CurDAG->getDataLayout())); in SelectADDRrr()
242 PairedReg = CurDAG->getRegister(GPVR, MVT::v2i32); in tryInlineAsm()
288 PairedReg = CurDAG->getRegister(GPVR, MVT::v2i32); in tryInlineAsm()
363 TopPart = CurDAG->getRegister(SP::G0, MVT::i32); in Select()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64AsmBackend.cpp612 getXRegFromWReg(*MRI.getLLVMRegNum(Inst.getRegister(), true)); in generateCompactUnwindEncoding()
635 MCRegister LRReg = *MRI.getLLVMRegNum(LRPush.getRegister(), true); in generateCompactUnwindEncoding()
636 MCRegister FPReg = *MRI.getLLVMRegNum(FPPush.getRegister(), true); in generateCompactUnwindEncoding()
658 MCRegister Reg1 = *MRI.getLLVMRegNum(Inst.getRegister(), true); in generateCompactUnwindEncoding()
669 MCRegister Reg2 = *MRI.getLLVMRegNum(Inst2.getRegister(), true); in generateCompactUnwindEncoding()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsSEISelDAGToDAG.cpp75 return Mips::MSACtrlRegClass.getRegister(RegNum); in getMSACtrlReg()
250 SDValue Zero = CurDAG->getRegister(Mips::ZERO, MVT::i32); in selectAddE()
776 CurDAG->getRegister(Mips::ZERO_64, MVT::i64), in trySelect()
1017 CurDAG->getRegister(Mips::HWR29, MVT::i32), in trySelect()
1102 SDValue ZeroVal = CurDAG->getRegister( in trySelect()
1126 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1149 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1205 SDValue ZeroVal = CurDAG->getRegister(Mips::ZERO, MVT::i32); in trySelect()
1262 SDValue Zero64Val = CurDAG->getRegister(Mips::ZERO_64, MVT::i64); in trySelect()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelDAGToDAG.cpp129 Reg = CurDAG->getRegister(XCore::CP, MVT::i32); in SelectInlineAsmMemoryOperand()
132 Reg = CurDAG->getRegister(XCore::DP, MVT::i32); in SelectInlineAsmMemoryOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYISelDAGToDAG.cpp93 ReplaceNode(N, CurDAG->getRegister(GP, N->getValueType(0)).getNode()); in INITIALIZE_PASS()
210 PairedReg = CurDAG->getRegister(GPVR, MVT::i64); in selectInlineAsm()
245 PairedReg = CurDAG->getRegister(GPVR, MVT::i64); in selectInlineAsm()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenInstAlias.h78 const Record *getRegister() const { in getRegister() function
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCDwarf.cpp1369 unsigned Reg1 = Instr.getRegister(); in emitCFIInstruction()
1393 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1415 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1426 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1436 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1452 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1482 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1488 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
1511 unsigned Reg = Instr.getRegister(); in emitCFIInstruction()
/freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/
H A DLanaiISelDAGToDAG.cpp129 Base = CurDAG->getRegister(Lanai::R0, CN->getValueType(0)); in selectAddrRiSpls()
142 Base = CurDAG->getRegister(Lanai::R0, CN->getValueType(0)); in selectAddrRiSpls()

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