Searched refs:getRegSplitParts (Results 1 – 5 of 5) sorted by relevance
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | SIRegisterInfo.h | 39 /// Sub reg indexes for getRegSplitParts. 312 ArrayRef<int16_t> getRegSplitParts(const TargetRegisterClass *RC,
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H A D | SIRegisterInfo.cpp | 126 SplitParts = TRI.getRegSplitParts(RC, EltSize); in SGPRSpillBuilder() 2984 ArrayRef<int16_t> SIRegisterInfo::getRegSplitParts(const TargetRegisterClass *RC, in getRegSplitParts() function in SIRegisterInfo
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H A D | SIFrameLowering.cpp | 350 SplitParts = TRI.getRegSplitParts(RC, EltSize); in PrologEpilogSGPRSpillBuilder()
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H A D | AMDGPUInstructionSelector.cpp | 556 ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(DstRC, SrcSize / 8); in selectG_MERGE_VALUES() 601 ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(SrcRC, DstSize / 8); in selectG_UNMERGE_VALUES() 3026 ArrayRef<int16_t> SubRegs = TRI.getRegSplitParts(SuperRC, EltSize); in computeIndirectRegIndex()
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H A D | SIInstrInfo.cpp | 747 ArrayRef<int16_t> BaseIndices = RI.getRegSplitParts(RC, 4); in expandSGPRCopy() 1096 ArrayRef<int16_t> SubIndices = RI.getRegSplitParts(RC, EltSize); in copyPhysReg() 1211 ArrayRef<int16_t> SubIndices = RI.getRegSplitParts(RegClass, EltSize); in materializeImmediate()
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