Searched refs:getRegClasses (Results 1 – 7 of 7) sorted by relevance
191 for (const auto &PossibleSubclass : RegisterClassHierarchy.getRegClasses()) { in visitRegisterBankClasses()208 BitVector BV(RegisterClassHierarchy.getRegClasses().size()); in visitRegisterBankClasses()229 (RegisterClassHierarchy.getRegClasses().size() + 31) / 32); in emitBaseClassImplementation()257 << RegisterClassHierarchy.getRegClasses().size() << ");\n"; in emitBaseClassImplementation()414 for (const auto &Class : RegisterClassHierarchy.getRegClasses()) { in run()
133 const auto &RegisterClasses = RegBank.getRegClasses(); in runEnums()204 unsigned NumRCs = RegBank.getRegClasses().size(); in EmitRegUnitPressure()211 for (const auto &RC : RegBank.getRegClasses()) { in EmitRegUnitPressure()1037 const auto &RegisterClasses = RegBank.getRegClasses(); in runMCDesc()1200 const auto &RegisterClasses = RegBank.getRegClasses(); in runTargetHeader()1241 const auto &RegisterClasses = RegBank.getRegClasses(); in runTargetDesc()1877 for (const CodeGenRegisterClass &RC : RegBank.getRegClasses()) { in debugDump()1899 for (const CodeGenRegisterClass &SRC : RegBank.getRegClasses()) { in debugDump()
32 for (const auto &RC : T.getRegBank().getRegClasses()) { in getRegisterValueType()
1259 auto &RegClassList = Target.getRegBank().getRegClasses(); in buildRegisterClasses()
104 auto &RegClasses = RegBank->getRegClasses(); in getRegNamespace()178 for (const auto &RC : getRegBank().getRegClasses()) { in getRegisterVTs()192 for (const auto &RC : getRegBank().getRegClasses()) in ReadLegalValueTypes()
930 std::list<CodeGenRegisterClass> &RegClasses = RegBank.getRegClasses(); in computeSubClasses()994 std::list<CodeGenRegisterClass> &RegClasses = RegBank.getRegClasses(); in getMatchingSubClassWithSubRegs()1744 for (CodeGenRegisterClass &RegClass : RegBank.getRegClasses()) { in computeUberSets()2021 auto &RegClasses = getRegClasses(); in computeRegUnitSets()2513 for (const CodeGenRegisterClass &RC : getRegClasses()) { in getRegClassForRegister()2554 for (const CodeGenRegisterClass &RC : getRegClasses()) { in getMinimalPhysRegClass()2569 auto &RegClasses = getRegClasses(); in getSuperRegForSubReg()
800 std::list<CodeGenRegisterClass> &getRegClasses() { return RegClasses; } in getRegClasses() function802 const std::list<CodeGenRegisterClass> &getRegClasses() const { in getRegClasses() function