Searched refs:getRegClassForReg (Results 1 – 6 of 6) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIRegisterInfo.h | 289 const TargetRegisterClass *getRegClassForReg(const MachineRegisterInfo &MRI,
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| H A D | SILoadStoreOptimizer.cpp | 1146 return TRI->getRegClassForReg(*MRI, Dst->getReg()); in getDataRegClass()
1149 return TRI->getRegClassForReg(*MRI, Src->getReg()); in getDataRegClass()
1152 return TRI->getRegClassForReg(*MRI, Src->getReg()); in getDataRegClass()
1155 return TRI->getRegClassForReg(*MRI, Dst->getReg()); in getDataRegClass()
1158 return TRI->getRegClassForReg(*MRI, Src->getReg()); in getDataRegClass()
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| H A D | SIRegisterInfo.cpp | 1349 const TargetRegisterClass *RC = getRegClassForReg(MF->getRegInfo(), ValueReg); in buildSpillLoadStore()
3000 SIRegisterInfo::getRegClassForReg(const MachineRegisterInfo &MRI, in getRegClassForReg() function in SIRegisterInfo
3008 const TargetRegisterClass *SrcRC = getRegClassForReg(MRI, MO.getReg()); in getRegClassForOperandReg()
3014 const TargetRegisterClass *RC = getRegClassForReg(MRI, Reg); in isVGPR()
3021 const TargetRegisterClass *RC = getRegClassForReg(MRI, Reg); in isAGPR()
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| H A D | SIFoldOperands.cpp | 849 const TargetRegisterClass *DestRC = TRI->getRegClassForReg(*MRI, DestReg); in foldOperand()
1056 TRI->getRegClassForReg(*MRI, OpToFold.getReg()); in foldOperand()
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| H A D | SIInstrInfo.cpp | 4739 const TargetRegisterClass *RC = RI.getRegClassForReg(MRI, Reg); in verifyInstruction()
4783 if (!MO.isReg() || !RI.hasVGPRs(RI.getRegClassForReg(MRI, MO.getReg()))) { in verifyInstruction()
6027 if (RI.hasAGPRs(RI.getRegClassForReg(MRI, MO.getReg())) && in legalizeOperandsVOP3()
6033 if (!RI.isSGPRClass(RI.getRegClassForReg(MRI, MO.getReg()))) in legalizeOperandsVOP3()
6227 RI.getRegClassForReg(MRI, OpReg), OpSubReg); in legalizeGenericOperand()
7385 NewDstRC == RI.getRegClassForReg(MRI, Inst.getOperand(1).getReg())) { in moveToVALUImpl()
8932 IsNullOrVectorRegister = !RI.isSGPRClass(RI.getRegClassForReg(MRI, Reg)); in isBasicBlockPrologue()
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| H A D | SIISelLowering.cpp | 15243 auto *RC = TRI->getRegClassForReg(MRI, Op.getReg()); in AdjustInstrPostInstrSelection()
15263 auto *RC = TRI->getRegClassForReg(MRI, Src2->getReg()); in AdjustInstrPostInstrSelection()
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