| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVSubtarget.cpp | 127 *this, *getRegBankInfo())); in getInstructionSelector()
138 const RISCVRegisterBankInfo *RISCVSubtarget::getRegBankInfo() const { in getRegBankInfo() function in RISCVSubtarget
|
| H A D | RISCVSubtarget.h | 324 const RISCVRegisterBankInfo *getRegBankInfo() const override;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/BPF/ |
| H A D | BPFSubtarget.h | 117 const RegisterBankInfo *getRegBankInfo() const override;
|
| H A D | BPFSubtarget.cpp | 131 const RegisterBankInfo *BPFSubtarget::getRegBankInfo() const { in getRegBankInfo() function in BPFSubtarget
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/ |
| H A D | M68kSubtarget.h | 184 const RegisterBankInfo *getRegBankInfo() const override;
|
| H A D | M68kSubtarget.cpp | 84 const RegisterBankInfo *M68kSubtarget::getRegBankInfo() const { in getRegBankInfo() function in M68kSubtarget
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVSubtarget.h | 124 const RegisterBankInfo *getRegBankInfo() const override { in getRegBankInfo() function
|
| H A D | SPIRVEmitNonSemanticDI.cpp | 166 const RegisterBankInfo *RBI = TM->getSubtargetImpl()->getRegBankInfo(); in emitGlobalDI()
|
| H A D | SPIRVISelLowering.cpp | 156 *STI.getRegBankInfo()); in doInsertBitcast()
625 *STI.getRegBankInfo()); in insertLogicalCopyOnResult()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetSubtargetInfo.h | 133 virtual const RegisterBankInfo *getRegBankInfo() const { return nullptr; } in getRegBankInfo() function
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCSubtarget.h | 318 const RegisterBankInfo *getRegBankInfo() const override;
|
| H A D | PPCSubtarget.cpp | 263 const RegisterBankInfo *PPCSubtarget::getRegBankInfo() const { in getRegBankInfo() function in PPCSubtarget
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsSubtarget.cpp | 301 const RegisterBankInfo *MipsSubtarget::getRegBankInfo() const { in getRegBankInfo() function in MipsSubtarget
|
| H A D | MipsSubtarget.h | 414 const RegisterBankInfo *getRegBankInfo() const override;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURegBankSelect.cpp | 225 *ST.getRegBankInfo()); in runOnMachineFunction()
|
| H A D | AMDGPURegBankLegalize.cpp | 279 const RegisterBankInfo &RBI = *ST.getRegBankInfo(); in runOnMachineFunction()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineUniformityAnalysis.cpp | 36 const auto &RBI = *F.getSubtarget().getRegBankInfo(); in markDefsDivergent()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostSelectOptimize.cpp | 255 auto RBI = Subtarget.getRegBankInfo(); in optimizeNZCVDefs()
|
| H A D | AArch64CallLowering.cpp | 1183 *MF.getSubtarget().getRegBankInfo(), *MIB, MIB->getDesc(), in lowerTailCall()
1300 *MF.getSubtarget().getRegBankInfo(), *MIB, in lowerTailCall()
1456 *MF.getSubtarget().getRegBankInfo(), *MIB, in lowerCall()
1489 *Subtarget.getRegBankInfo(), *MIB, MIB->getDesc(), in lowerCall()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMSubtarget.cpp | 130 const RegisterBankInfo *ARMSubtarget::getRegBankInfo() const { in getRegBankInfo() function in ARMSubtarget
|
| H A D | ARMSubtarget.h | 254 const RegisterBankInfo *getRegBankInfo() const override;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64Subtarget.h | 157 const RegisterBankInfo *getRegBankInfo() const override;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86Subtarget.cpp | 379 const RegisterBankInfo *X86Subtarget::getRegBankInfo() const { in getRegBankInfo() function in X86Subtarget
|
| H A D | X86Subtarget.h | 156 const RegisterBankInfo *getRegBankInfo() const override;
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/M68k/GISel/ |
| H A D | M68kCallLowering.cpp | 228 *STI.getRegBankInfo(), *MIB, MIB->getDesc(), in lowerCall()
|