Searched refs:getPointerReg (Results 1 – 7 of 7) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LoadStoreOpt.cpp | 113 BaseIndexOffset BasePtr0 = getPointerInfo(LdSt1->getPointerReg(), MRI); in aliasIsKnownForLoadStore()
114 BaseIndexOffset BasePtr1 = getPointerInfo(LdSt2->getPointerReg(), MRI); in aliasIsKnownForLoadStore()
207 if (!mi_match(LS->getPointerReg(), MRI, in instMayAlias()
209 BaseReg = LS->getPointerReg(); in instMayAlias()
310 LLT PtrTy = MRI->getType(StoresToMerge[0]->getPointerReg()); in mergeStores()
417 Builder.buildStore(WideReg, FirstStore->getPointerReg(), *WideMMO); in doSingleStoreMerge()
519 LLT PtrTy = MRI->getType(StoreMI.getPointerReg()); in addStoreToCandidate()
535 Register StoreAddr = StoreMI.getPointerReg(); in addStoreToCandidate()
562 if (MRI->getType(C.Stores[0]->getPointerReg()).getAddressSpace() != in addStoreToCandidate()
746 if (!mi_match(LastStore.getPointerReg(), *MRI, in mergeTruncStore()
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| H A D | CombinerHelper.cpp | 758 LLT SrcTy = MRI.getType(LoadMI->getPointerReg()); in matchCombineExtendingLoads()
921 Register PtrReg = LoadMI->getPointerReg(); in matchCombineLoadWithAndMask()
1073 MRI.getType(LoadDef->getPointerReg())}, in matchSextInRegOfLoad()
1101 LoadDef->getPointerReg(), *NewMMO); in applySextInRegOfLoad()
1111 auto *Addr = getOpcodeDef<GPtrAdd>(MI->getPointerReg(), MRI); in canFoldInAddressingMode()
1145 LLT PtrTy = MRI.getType(LdSt.getPointerReg()); in isIndexedLoadStoreLegal()
1177 Register Ptr = LdSt.getPointerReg(); in findPostIndexCandidate()
1268 Addr = LdSt.getPointerReg(); in findPreIndexCandidate()
1384 Register VecPtr = LoadMI->getPointerReg(); in matchCombineExtractedVectorLoad()
1414 LoadMI->getPointerReg(), MRI.getType(LoadMI->getOperand(0).getReg()), in matchCombineExtractedVectorLoad()
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| H A D | LegalizerHelper.cpp | 1364 MIRBuilder.buildLoad(TmpReg, LoadMI.getPointerReg(), LoadMI.getMMO()); in narrowScalar()
1376 Register PtrReg = LoadMI.getPointerReg(); in narrowScalar()
1416 MIRBuilder.buildStore(TmpReg, StoreMI.getPointerReg(), StoreMI.getMMO()); in narrowScalar()
3472 Register PtrReg = LoadMI.getPointerReg(); in lowerLoad()
3614 Register PtrReg = StoreMI.getPointerReg(); in lowerStore()
4625 Register AddrReg = LdStMI.getPointerReg(); in reduceLoadStoreWidth()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64PostLegalizerCombiner.cpp | 333 Register PtrReg = Store.getPointerReg(); in applySplitStoreZero128()
606 auto NewPtr = MIB.buildPtrAdd(MRI.getType(SInfo.St->getPointerReg()), in tryOptimizeConsecStores()
727 Register PtrReg = St->getPointerReg(); in optimizeConsecutiveMemOpAddressing()
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| H A D | AArch64InstructionSelector.cpp | 2876 LLT PtrTy = MRI.getType(LdSt.getPointerReg()); in select()
2924 const Register PtrReg = LdSt.getPointerReg(); in select()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | GenericMachineInstrs.h | 84 Register getPointerReg() const { return getOperand(1).getReg(); } in getPointerReg() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 731 LLT PtrTy = MRI.getType(LdSt.getPointerReg()); in select()
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