Home
last modified time | relevance | path

Searched refs:getOpcodeDef (Results 1 – 13 of 13) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64PostLegalizerCombiner.cpp79 auto *FAddMI = getOpcodeDef(TargetOpcode::G_FADD, Src1, MRI); in matchExtractVecEltPairwiseAdd()
91 getOpcodeDef(TargetOpcode::G_SHUFFLE_VECTOR, Src1Op2, MRI); in matchExtractVecEltPairwiseAdd()
94 Shuffle = getOpcodeDef(TargetOpcode::G_SHUFFLE_VECTOR, Src1Op1, MRI); in matchExtractVecEltPairwiseAdd()
357 auto *BV1 = getOpcodeDef<GBuildVector>(BVO1, MRI); in matchOrToBSP()
358 auto *BV2 = getOpcodeDef<GBuildVector>(BVO2, MRI); in matchOrToBSP()
H A DAArch64PostLegalizerLowering.cpp264 auto *InsMI = getOpcodeDef(TargetOpcode::G_INSERT_VECTOR_ELT, in matchDupFromInsertVectorElt()
269 if (!getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, InsMI->getOperand(1).getReg(), in matchDupFromInsertVectorElt()
291 getOpcodeDef(TargetOpcode::G_BUILD_VECTOR, in matchDupFromBuildVector()
364 if (!getOpcodeDef<GImplicitDef>(V2, MRI) || in matchEXT()
1131 MachineInstr *Ext = getOpcodeDef(AArch64::G_EXT, Unmerge.getSourceReg(), MRI); in matchUnmergeExtToUnmerge()
1142 if (!getOpcodeDef<GImplicitDef>(ExtSrc2, MRI)) in matchUnmergeExtToUnmerge()
H A DAArch64InstructionSelector.cpp1730 MachineInstr *AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp()
1774 AndInst = getOpcodeDef(TargetOpcode::G_AND, LHS, MRI); in tryOptCompareBranchFedByICmp()
2485 return getOpcodeDef(TargetOpcode::G_ICMP, Reg, MRI); in earlySelect()
2492 auto *Cmp = getOpcodeDef(TargetOpcode::G_ICMP, ZExt, MRI); in earlySelect()
3438 auto *LoadMI = getOpcodeDef(TargetOpcode::G_LOAD, SrcReg, MRI); in select()
5322 MachineInstr *Extract = getOpcodeDef(TargetOpcode::G_EXTRACT_VECTOR_ELT, in selectUSMovFromExtend()
5859 getOpcodeDef(TargetOpcode::G_CONSTANT, I.getOperand(Idx).getReg(), MRI); in tryOptConstantBuildVec()
5863 else if ((OpMI = getOpcodeDef(TargetOpcode::G_FCONSTANT, in tryOptConstantBuildVec()
5893 return !getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, Op.getReg(), MRI); in tryOptBuildVecToSubregToReg()
5951 if (!getOpcodeDef<GImplicitDef>(OpReg, MRI)) { in selectBuildVector()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DCombinerHelperVectorOps.cpp126 getOpcodeDef<GInsertVectorElement>(Vector, MRI); in matchExtractVectorElementWithDifferentIndices()
216 GBuildVectorTrunc *Build = getOpcodeDef<GBuildVectorTrunc>(Vector, MRI); in matchExtractVectorElementWithBuildVectorTrunc()
H A DCombinerHelper.cpp1076 if (auto *LoadMI = getOpcodeDef<GSExtLoad>(LoadUser, MRI)) { in matchSextTruncSextLoad()
1106 auto *LoadDef = getOpcodeDef<GLoad>(SrcReg, MRI); in matchSextInRegOfLoad()
1179 auto *Addr = getOpcodeDef<GPtrAdd>(MI->getPointerReg(), MRI); in canFoldInAddressingMode()
1253 if (getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Ptr, MRI)) in findPostIndexCandidate()
1393 auto *LoadMI = getOpcodeDef<GLoad>(MI.getOperand(1).getReg(), MRI); in matchCombineExtractedVectorLoad()
2191 auto *Unmerge = getOpcodeDef<GUnmerge>(MergedValues[0], MRI); in matchCombineMergeUnmerge()
2218 auto *SrcInstr = getOpcodeDef<GMergeLikeInstr>(SrcReg, MRI); in matchCombineUnmergeMergeToPlainValues()
2745 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAnyExplicitUseIsUndef()
2752 getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MO.getReg(), MRI); in matchAllExplicitUsesAreUndef()
2764 return getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, MI.getOperand(0).getReg(), in matchUndefStore()
[all …]
H A DUtils.cpp645 MachineInstr *llvm::getOpcodeDef(unsigned Opcode, Register Reg, in getOpcodeDef() function in llvm
790 auto *SrcVec2 = getOpcodeDef<GBuildVector>(Op2, MRI); in ConstantFoldVectorBinop()
794 auto *SrcVec1 = getOpcodeDef<GBuildVector>(Op1, MRI); in ConstantFoldVectorBinop()
1009 auto *BV = getOpcodeDef<GBuildVector>(Src, MRI); in ConstantFoldCountZeros()
1083 auto *BV1 = getOpcodeDef<GBuildVector>(Op1, MRI); in ConstantFoldICmp()
1084 auto *BV2 = getOpcodeDef<GBuildVector>(Op2, MRI); in ConstantFoldICmp()
1508 getOpcodeDef<GImplicitDef>(BV->getSourceReg(SrcIdx), MRI)) in isConstantOrConstantVector()
1782 GBuildVector *BV = getOpcodeDef<GBuildVector>(ShiftAmount, MRI); in shiftAmountKnownInRange()
H A DLegalizerHelper.cpp9739 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in lowerMemset()
9892 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in lowerMemcpy()
10000 MachineInstr *FIDef = getOpcodeDef(TargetOpcode::G_FRAME_INDEX, Dst, MRI); in lowerMemmove()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h229 LLVM_ABI MachineInstr *getOpcodeDef(unsigned Opcode, Register Reg,
288 T *getOpcodeDef(Register Reg, const MachineRegisterInfo &MRI) { in getOpcodeDef() function
H A DLegalizationArtifactCombiner.h385 if (MachineInstr *DefMI = getOpcodeDef(TargetOpcode::G_IMPLICIT_DEF, in tryFoldImplicitDef()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86LegalizerInfo.cpp706 if (getOpcodeDef<GImplicitDef>(Source, MRI)) { in legalizeBuildVector()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPULegalizerInfo.cpp3825 if (MachineInstr *SrcFNeg = getOpcodeDef(AMDGPU::G_FNEG, ModSrc, MRI)) { in stripAnySourceMods()
3827 if (MachineInstr *SrcFAbs = getOpcodeDef(AMDGPU::G_FABS, ModSrc, MRI)) in stripAnySourceMods()
3829 } else if (MachineInstr *SrcFAbs = getOpcodeDef(AMDGPU::G_FABS, ModSrc, MRI)) in stripAnySourceMods()
H A DAMDGPUInstructionSelector.cpp2823 MachineInstr *Fabs = getOpcodeDef(TargetOpcode::G_FABS, Src, *MRI); in selectG_FNEG()
6109 = getOpcodeDef(TargetOpcode::G_PTR_ADD, Data.N0, *MRI)) { in parseMUBUFAddress()
H A DAMDGPURegisterBankInfo.cpp1304 MachineInstr *Add = getOpcodeDef(AMDGPU::G_ADD, CombinedOffset, *MRI); in setBufferOffsets()