Searched refs:getNumRegClasses (Results 1 – 12 of 12) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterBank.cpp | 25 for (unsigned RCId = 0, End = TRI.getNumRegClasses(); RCId != End; ++RCId) { in RegisterBank()
87 assert(NumRegClasses == TRI->getNumRegClasses() &&
91 for (unsigned RCId = 0, End = TRI->getNumRegClasses(); RCId != End; ++RCId) { in print()
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| H A D | RegisterClassInfo.cpp | 51 RegClass.reset(new RCInfo[TRI->getNumRegClasses()]); in runOnMachineFunction()
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| H A D | RegAllocFast.cpp | 1268 assert(RegClassDefCounts.size() == TRI->getNumRegClasses()); in addRegClassDefCounts()
1274 for (unsigned RCIdx = 0, RCIdxEnd = TRI->getNumRegClasses(); in addRegClassDefCounts()
1285 for (unsigned RCIdx = 0, RCIdxEnd = TRI->getNumRegClasses(); in addRegClassDefCounts()
1330 SmallVector<unsigned> RegClassDefCounts(TRI->getNumRegClasses(), 0); in findAndSortDefOperandIndexes()
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| H A D | TargetRegisterInfo.cpp | 279 for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; I += 32) in firstCommonClass()
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| H A D | TargetLoweringBase.cpp | 1231 BitVector SuperRegRC(TRI->getNumRegClasses()); in findRepresentativeClass()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 801 return RCInfos[getNumRegClasses() * HwMode + RC.getID()]; in getRegClassInfo()
812 unsigned getNumRegClasses() const { in getNumRegClasses() function
819 assert(i < getNumRegClasses() && "Register Class ID out of range"); in getRegClass()
1252 : RCMaskWords((TRI->getNumRegClasses() + 31) / 32),
1351 : NumRegClasses(TRI.getNumRegClasses()), Mask(Mask), CurrentChunk(*Mask) { in BitMaskClassIterator()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRewritePartialRegUses.cpp | 208 BV.resize(TRI->getNumRegClasses()); in getAllocatableAndAlignedRegClassMask()
209 for (unsigned ClassID = 0; ClassID < TRI->getNumRegClasses(); ++ClassID) { in getAllocatableAndAlignedRegClassMask()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/MC/ |
| H A D | MCRegisterInfo.h | 445 unsigned getNumRegClasses() const { in getNumRegClasses() function
452 assert(i < getNumRegClasses() && "Register Class ID out of range"); in getRegClass()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | ResourcePriorityQueue.cpp | 54 unsigned NumRC = TRI->getNumRegClasses(); in ResourcePriorityQueue()
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| H A D | ScheduleDAGRRList.cpp | 1769 unsigned NumRC = TRI->getNumRegClasses(); in RegReductionPQBase()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXAsmPrinter.cpp | 1762 for (unsigned i=0; i< TRI->getNumRegClasses(); i++) { in setAndEmitFunctionVirtualRegisters()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/MIRParser/ |
| H A D | MIParser.cpp | 276 for (unsigned I = 0, E = TRI->getNumRegClasses(); I < E; ++I) { in initNames2RegClasses()
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