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Searched refs:getNumAllocatableRegs (Results 1 – 8 of 8) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DRegisterClassInfo.cpp182 if (Super != RC && getNumAllocatableRegs(Super) > RCI.NumRegs) in compute()
224 unsigned NAllocatableRegs = getNumAllocatableRegs(RC); in computePSetLimit()
H A DRegAllocEvictionAdvisor.cpp235 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg())) < in canEvictInterferenceBasedOnCost()
236 RegClassInfo.getNumAllocatableRegs( in canEvictInterferenceBasedOnCost()
H A DMLRegallocEvictAdvisor.cpp
H A DMLRegAllocEvictAdvisor.cpp644 RegClassInfo.getNumAllocatableRegs(MRI->getRegClass(VirtReg.reg())) < in loadInterferenceFeatures()
645 RegClassInfo.getNumAllocatableRegs( in loadInterferenceFeatures()
H A DRegAllocGreedy.cpp327 (2 * RegClassInfo.getNumAllocatableRegs(&RC))); in getPriority()
1347 return RCI.getNumAllocatableRegs(ConstrainedRC); in getNumAllocatableRegsForConstraints()
1442 RegClassInfo.getNumAllocatableRegs(SuperRC); in tryInstructionSplit()
H A DMachineScheduler.cpp3292 unsigned NIntRegs = Context->RegClassInfo->getNumAllocatableRegs( in initPolicy()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterClassInfo.h94 unsigned getNumAllocatableRegs(const TargetRegisterClass *RC) const { in getNumAllocatableRegs() function
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DGCNSchedStrategy.cpp75 Context->RegClassInfo->getNumAllocatableRegs(&AMDGPU::SGPR_32RegClass); in initialize()
77 Context->RegClassInfo->getNumAllocatableRegs(&AMDGPU::VGPR_32RegClass); in initialize()