Home
last modified time | relevance | path

Searched refs:getMinimalPhysRegClass (Results 1 – 25 of 48) sorted by relevance

12

/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DRDFCopy.cpp50 if (TRI.getMinimalPhysRegClass(DstR.Reg) != in interpretAsCopy()
51 TRI.getMinimalPhysRegClass(SrcR.Reg)) in interpretAsCopy()
160 const TargetRegisterClass &RC = *TRI.getMinimalPhysRegClass(RR.Reg); in run()
H A DHexagonVLIWPacketizer.cpp706 predRegClass = HRI->getMinimalPhysRegClass(predRegNumSrc); in canPromoteToNewValueStore()
718 predRegClass = HRI->getMinimalPhysRegClass(predRegNumDst); in canPromoteToNewValueStore()
1428 RC = HRI->getMinimalPhysRegClass(DepReg); in isLegalToPacketizeTogether()
H A DHexagonFrameLowering.cpp1407 const TargetRegisterClass *RC = HRI.getMinimalPhysRegClass(Reg); in insertCSRSpillsInBlock()
1471 const TargetRegisterClass *RC = HRI.getMinimalPhysRegClass(Reg); in insertCSRRestoresInBlock()
1654 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(S->Reg); in assignCalleeSavedSpillSlots()
1666 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(R); in assignCalleeSavedSpillSlots()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp206 getMinimalPhysRegClass(const TargetRegisterInfo *TRI, MCRegister Reg, in getMinimalPhysRegClass() function
262 TargetRegisterInfo::getMinimalPhysRegClass(MCRegister Reg, MVT VT) const { in getMinimalPhysRegClass() function in TargetRegisterInfo
263 return ::getMinimalPhysRegClass(this, Reg, VT); in getMinimalPhysRegClass()
273 return ::getMinimalPhysRegClass(this, Reg, Ty); in getMinimalPhysRegClassLLT()
549 RC = getMinimalPhysRegClass(Reg); in getRegSizeInBits()
H A DTargetFrameLoweringImpl.cpp199 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); in spillCalleeSavedRegister()
214 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); in restoreCalleeSavedRegister()
H A DFixupStatepointCallerSaved.cpp98 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg); in getRegisterSize()
419 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg); in spillRegisters()
429 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg); in insertReloadBefore()
H A DRegisterBankInfo.cpp89 const TargetRegisterClass *RC = getMinimalPhysRegClass(Reg, TRI); in getRegBank()
103 RegisterBankInfo::getMinimalPhysRegClass(MCRegister Reg, in getMinimalPhysRegClass() function in RegisterBankInfo
505 auto *RC = getMinimalPhysRegClass(Reg, TRI); in getSizeInBits()
H A DStackMaps.cpp273 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(MOI->getReg()); in parseOperand()
369 unsigned Size = TRI->getSpillSize(*TRI->getMinimalPhysRegClass(Reg)); in createLiveOutReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyReplacePhysRegs.cpp83 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(PReg); in runOnMachineFunction()
H A DWebAssemblyInstrInfo.cpp69 : MRI.getTargetRegisterInfo()->getMinimalPhysRegClass(DestReg); in copyPhysReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsFrameLowering.cpp121 unsigned RegSize = TRI.getSpillSize(*TRI.getMinimalPhysRegClass(*R)); in estimateStackSize()
H A DMipsSEFrameLowering.cpp260 const TargetRegisterClass *DstRC = RegInfo.getMinimalPhysRegClass(Dst); in expandCopyACC()
797 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); in spillCalleeSavedRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRFrameLowering.cpp270 assert(TRI->getRegSizeInBits(*TRI->getMinimalPhysRegClass(Reg)) == 8 && in spillCalleeSavedRegisters()
307 assert(TRI->getRegSizeInBits(*TRI->getMinimalPhysRegClass(Reg)) == 8 && in restoreCalleeSavedRegisters()
H A DAVRAsmPrinter.cpp135 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(Reg); in PrintAsmOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSILowerSGPRSpills.cpp130 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass( in insertCSRSaves()
271 TRI->getMinimalPhysRegClass(Reg, MVT::i32); in spillCalleeSavedRegs()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64LoadStoreOptimizer.cpp1054 TRI->getMinimalPhysRegClass(MOP.getReg())); in mergePairedInsns()
1074 TRI->getMinimalPhysRegClass(MOP.getReg())); in mergePairedInsns()
1701 auto *RegClass = TRI->getMinimalPhysRegClass(MOP.getReg()); in canRenameMOP()
1800 RequiredClasses.insert(TRI->getMinimalPhysRegClass(MOP.getReg())); in canRenameUpToDef()
1813 RequiredClasses.insert(TRI->getMinimalPhysRegClass(MOP.getReg())); in canRenameUpToDef()
1867 RequiredClasses.insert(TRI->getMinimalPhysRegClass(MOP.getReg())); in canRenameUntilSecondLoad()
1907 auto *RegClass = TRI->getMinimalPhysRegClass(Reg); in tryToFindRegisterToRename()
1935 auto *RegClass = TRI->getMinimalPhysRegClass(getLdStRegOp(FirstMI).getReg()); in findRenameRegForSameLdStRegPair()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreFrameLowering.cpp434 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); in spillCalleeSavedRegisters()
460 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); in restoreCalleeSavedRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/
H A DCSKYFrameLowering.cpp478 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); in spillCalleeSavedRegisters()
500 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); in restoreCalleeSavedRegisters()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DRegisterBankInfo.h448 getMinimalPhysRegClass(MCRegister Reg, const TargetRegisterInfo &TRI) const;
H A DTargetRegisterInfo.h349 const TargetRegisterClass *getMinimalPhysRegClass(MCRegister Reg,
/freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/
H A DXtensaFrameLowering.cpp315 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); in spillCalleeSavedRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/
H A DLoongArchFrameLowering.cpp451 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg); in spillCalleeSavedRegisters()
/freebsd/contrib/llvm-project/llvm/utils/TableGen/Common/
H A DCodeGenRegisters.h829 getMinimalPhysRegClass(const Record *RegRecord,
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FrameLowering.cpp2988 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT); in assignCalleeSavedSpillSlots()
3093 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT); in spillCalleeSavedRegisters()
3167 const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(Reg, VT); in restoreCalleeSavedRegisters()
4356 Offset += TRI->getSpillSize(*TRI->getMinimalPhysRegClass(BP)); in spillFPBPUsingSP()
4432 RC = TRI->getMinimalPhysRegClass(FP); in saveAndRestoreFPBPUsingSP()
4439 RC = TRI->getMinimalPhysRegClass(BP); in saveAndRestoreFPBPUsingSP()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/AsmPrinter/
H A DDwarfExpression.cpp144 const TargetRegisterClass *RC = TRI.getMinimalPhysRegClass(MachineReg); in addMachineReg()

12