| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64SelectionDAGInfo.cpp | 300 SDValue AddrNode = DAG.getMemBasePlusOffset( in EmitUnrolledSetTag() 313 SDValue AddrNode = DAG.getMemBasePlusOffset( in EmitUnrolledSetTag()
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| H A D | AArch64ISelLowering.cpp | 23647 DAG.getMemBasePlusOffset(BasePtr, Offset2, DL), in combineV3I8LoadExt() 23729 SDValue NewPtr = DAG.getMemBasePlusOffset( in performLOADCombine() 23748 SDValue NewPtr = DAG.getMemBasePlusOffset( in performLOADCombine() 23948 SDValue Ptr2 = DAG.getMemBasePlusOffset(ST->getBasePtr(), Offset2, DL); in combineI8TruncStore() 23954 SDValue Ptr1 = DAG.getMemBasePlusOffset(ST->getBasePtr(), Offset1, DL); in combineI8TruncStore()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | SelectionDAG.h | 1122 getMemBasePlusOffset(SDValue Base, TypeSize Offset, const SDLoc &DL, 1125 getMemBasePlusOffset(SDValue Base, SDValue Offset, const SDLoc &DL, 1132 return getMemBasePlusOffset(Ptr, Offset, SL, SDNodeFlags::NoUnsignedWrap); 1138 return getMemBasePlusOffset(Ptr, Offset, SL, SDNodeFlags::NoUnsignedWrap);
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeDAG.cpp | 475 Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(4), dl); in OptimizeFloatStore() 585 DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(IncrementSize), dl); in LegalizeStoreOps() 806 DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(IncrementSize), dl); in LegalizeLoadOps() 835 DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(IncrementSize), dl); in LegalizeLoadOps() 1608 DAG.getMemBasePlusOffset(FIPtr, TypeSize::getFixed(Offset), dl); in ExpandVectorBuildThroughStack() 1670 DAG.getMemBasePlusOffset(StackPtr, TypeSize::getFixed(ByteOffset), DL); in getSignAsIntValue() 2714 DAG.getMemBasePlusOffset(StackSlot, TypeSize::getFixed(4), dl); in ExpandLegalINT_TO_FP() 4187 SDValue Addr = DAG.getMemBasePlusOffset(Table, Index, dl); in ExpandNode() 4198 Addr = DAG.getMemBasePlusOffset(TLI.getPICJumpTableRelocBase(Table, DAG), in ExpandNode()
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| H A D | LegalizeTypesGeneric.cpp | 179 DAG.getMemBasePlusOffset(StackPtr, TypeSize::getFixed(IncrementSize), dl); in ExpandRes_BITCAST()
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| H A D | SelectionDAG.cpp | 8299 SDValue SelectionDAG::getMemBasePlusOffset(SDValue Base, TypeSize Offset, in getMemBasePlusOffset() function in SelectionDAG 8312 return getMemBasePlusOffset(Base, Index, DL, Flags); in getMemBasePlusOffset() 8315 SDValue SelectionDAG::getMemBasePlusOffset(SDValue Ptr, SDValue Offset, in getMemBasePlusOffset() function in SelectionDAG 8493 DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl), in getMemcpyLoadsAndStores() 8518 DAG.getMemBasePlusOffset(Src, TypeSize::getFixed(SrcOff), dl), in getMemcpyLoadsAndStores() 8525 DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl), in getMemcpyLoadsAndStores() 8662 DAG.getMemBasePlusOffset(Src, TypeSize::getFixed(SrcOff), dl), in getMemmoveLoadsAndStores() 8677 DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl), in getMemmoveLoadsAndStores() 8809 DAG.getMemBasePlusOffset(Dst, TypeSize::getFixed(DstOff), dl), in getMemsetStores()
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| H A D | LegalizeIntegerTypes.cpp | 4321 Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(IncrementSize), dl); in ExpandIntRes_LOAD() 4345 Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(IncrementSize), dl); in ExpandIntRes_LOAD() 4898 AdjStackPtr = DAG.getMemBasePlusOffset( in ExpandIntRes_ShiftThroughStack() 4905 AdjStackPtr = DAG.getMemBasePlusOffset(AdjStackPtr, ByteOffset, dl); in ExpandIntRes_ShiftThroughStack()
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| H A D | SelectionDAGBuilder.cpp | 4380 N = DAG.getMemBasePlusOffset( in visitGetElementPtr() 4425 N = DAG.getMemBasePlusOffset(N, OffsVal, dl, Flags); in visitGetElementPtr() 4491 N = DAG.getMemBasePlusOffset(N, IdxN, dl, AddFlags); in visitGetElementPtr() 7738 SDValue Add = DAG.getMemBasePlusOffset(FPVal, OffsetVal, sdl); in visitIntrinsicCall() 9206 SDValue DstPlusSize = DAG.getMemBasePlusOffset(Dst, Size, sdl); in visitMemPCpyCall() 11297 SDValue Add = CLI.DAG.getMemBasePlusOffset( in LowerCallTo()
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| H A D | DAGCombiner.cpp | 2709 return DAG.getMemBasePlusOffset(X, Add, DL, Flags); in visitPTRADD() 11312 SDValue NewPtr = DAG.getMemBasePlusOffset( in visitFunnelShift() 13966 BasePtr = DAG.getMemBasePlusOffset(BasePtr, TypeSize::getFixed(Stride), DL); in CombineExtLoad() 15509 DAG.getMemBasePlusOffset(LN0->getBasePtr(), TypeSize::getFixed(PtrOff), in reduceLoadWidth() 20857 Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(StOffset), DL); in ShrinkLoadReplaceStoreWithStore() 21007 DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(PtrOff), SDLoc(LD)); in ReduceLoadOpStoreWidth() 22393 Ptr = DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(4), DL); in replaceStoreOfFPConstant() 22451 NewPtr = DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(COffset), DL); in replaceStoreOfInsertLoad() 22869 DAG.getMemBasePlusOffset(Ptr, TypeSize::getFixed(HalfValBitSize / 8), DL); in splitMergedValStore() 25655 SDValue NewAddr = DAG.getMemBasePlusOffset(Ld->getBasePtr(), Offset, DL); in narrowExtractedVectorLoad()
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| H A D | TargetLowering.cpp | 9489 DAG.getMemBasePlusOffset(CPIdx, Lookup, DL), in CTTZTableLookup() 10666 return DAG.getMemBasePlusOffset(VecPtr, Index, dl); in getVectorSubVecPointer()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonISelLowering.cpp | 3255 DAG.getMemBasePlusOffset(BaseNoOff, TypeSize::getFixed(BO.second), dl); in LowerUnalignedLoad() 3256 SDValue Base1 = DAG.getMemBasePlusOffset( in LowerUnalignedLoad()
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| H A D | HexagonISelLoweringHVX.cpp | 3015 DAG.getMemBasePlusOffset(Base0, TypeSize::getFixed(HwLen), dl); in SplitHvxMemOp()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVISelDAGToDAG.cpp | 93 CurDAG->getMemBasePlusOffset(StackSlot, TypeSize::getFixed(4), DL); in PreprocessISelDAG()
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| H A D | RISCVISelLowering.cpp | 5738 SDValue NewAddr = DAG.getMemBasePlusOffset( in lowerVECTOR_SHUFFLE() 22406 DAG.getMemBasePlusOffset(FIN, TypeSize::getFixed(XLenInBytes), DL); in LowerFormalArguments()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6733 SDValue Ptr = DAG.getMemBasePlusOffset(Mem->getBasePtr(), in getBROADCAST_LOAD() 13115 DAG.getMemBasePlusOffset(BaseAddr, TypeSize::getFixed(Offset), DL); in lowerShuffleAsBroadcast() 20624 DAG.getMemBasePlusOffset(StackSlot, TypeSize::getFixed(4), dl); in LowerUINT_TO_FP() 25474 DAG.getMemBasePlusOffset(Ptr0, TypeSize::getFixed(HalfOffset), DL); in splitVectorStore() 25508 SDValue Ptr = DAG.getMemBasePlusOffset(Store->getBasePtr(), in scalarizeVectorStore() 25897 FIN = DAG.getMemBasePlusOffset(FIN, TypeSize::getFixed(4), DL); in LowerVASTART() 42405 SDValue Ptr = DAG.getMemBasePlusOffset( in combineTargetShuffle() 52953 DAG.getMemBasePlusOffset(Ptr1, TypeSize::getFixed(HalfOffset), dl); in combineLoad() 53082 Addr = DAG.getMemBasePlusOffset(Addr, TypeSize::getFixed(Offset), in getParamsForOneTrueMaskedElt() 53373 SDValue Ptr1 = DAG.getMemBasePlusOffset(Ptr0, TypeSize::getFixed(4), dl); in combineStore()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIISelLowering.cpp | 15156 SDValue Inner = DAG.getMemBasePlusOffset(X, Y, DL, Flags); in performPtrAddCombine() 15158 return DAG.getMemBasePlusOffset(Inner, Z, DL, Flags); in performPtrAddCombine()
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