Searched refs:getMaxNumVGPRs (Results 1 – 11 of 11) sorted by relevance
1489 unsigned getMaxNumVGPRs(unsigned WavesPerEU) const { in getMaxNumVGPRs() function1490 return AMDGPU::IsaInfo::getMaxNumVGPRs(this, WavesPerEU); in getMaxNumVGPRs()1505 unsigned getMaxNumVGPRs(const Function &F) const;1508 return getMaxNumVGPRs(F); in getMaxNumAGPRs()1519 unsigned getMaxNumVGPRs(const MachineFunction &MF) const;
250 MaxNumVGPRs = ST->getMaxNumVGPRs(MF); in runOnMachineFunction()251 MaxNumVGPRs = std::min(ST->getMaxNumVGPRs(MFI->getOccupancy()), MaxNumVGPRs); in runOnMachineFunction()
831 unsigned MaxNumVGPRs = getMaxNumVGPRs(WavesPerEU.first); in getBaseMaxNumVGPRs()844 if (Requested && Requested > getMaxNumVGPRs(WavesPerEU.first)) in getBaseMaxNumVGPRs()857 unsigned GCNSubtarget::getMaxNumVGPRs(const Function &F) const { in getMaxNumVGPRs() function in GCNSubtarget861 unsigned GCNSubtarget::getMaxNumVGPRs(const MachineFunction &MF) const { in getMaxNumVGPRs() function in GCNSubtarget
106 ST.getMaxNumVGPRs(F) <= AMDGPU::VGPR_32RegClass.getNumRegs() && in SIMachineFunctionInfo()172 AMDGPU::VGPR_32RegClass.getRegister(ST.getMaxNumVGPRs(F) - 1); in SIMachineFunctionInfo()
92 std::min(ST.getMaxNumVGPRs(TargetOccupancy), VGPRExcessLimit); in initialize()1065 unsigned MaxVGPRs = ST.getMaxNumVGPRs(MF); in checkScheduling()
113 unsigned MaxVGPRs = ST.getMaxNumVGPRs(MF); in less()
671 unsigned MaxNumVGPRs = ST.getMaxNumVGPRs(MF); in getReservedRegs()3058 return std::min(ST.getMaxNumVGPRs(Occupancy), ST.getMaxNumVGPRs(MF)); in getRegPressureLimit()
186 unsigned MaxVGPRs = ST.getMaxNumVGPRs(ST.getWavesPerEU(F).first); in getMaxVGPRs()
3149 unsigned MaxNumVGPRs = Subtarget->getMaxNumVGPRs(MF); in CanLowerReturn()
310 unsigned getMaxNumVGPRs(const MCSubtargetInfo *STI, unsigned WavesPerEU);
1219 unsigned getMaxNumVGPRs(const MCSubtargetInfo *STI, unsigned WavesPerEU) { in getMaxNumVGPRs() function