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Searched refs:getMatchingSuperReg (Results 1 – 25 of 39) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineFunctionInfo.cpp199 ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addPrivateSegmentBuffer()
206 ArgInfo.DispatchPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchPtr()
213 ArgInfo.QueuePtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addQueuePtr()
221 = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addKernargSegmentPtr()
228 ArgInfo.DispatchID = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addDispatchID()
235 ArgInfo.FlatScratchInit = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addFlatScratchInit()
248 ArgInfo.ImplicitBufferPtr = ArgDescriptor::createRegister(TRI.getMatchingSuperReg( in addImplicitBufferPtr()
272 TRI.getMatchingSuperReg(getNextUserSGPR(), AMDGPU::sub0, RC); in addPreloadedKernArg()
H A DAMDGPUPreloadKernArgProlog.cpp167 Register LoadReg = TRI.getMatchingSuperReg(KernArgPreloadSGPR, in getLoadParameters()
H A DR600ControlFlowFinalizer.cpp278 DstMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
287 SrcMI = TRI->getMatchingSuperReg(Reg, in isCompatibleWithClause()
H A DSIRegisterInfo.cpp565 return getMatchingSuperReg(BaseReg, AMDGPU::sub0, RC); in getAlignedHighSGPRForRC()
3806 getMatchingSuperReg(Paired, AMDGPU::lo16, &AMDGPU::VGPR_32RegClass); in getRegAllocationHints()
3808 PairedPhys = getMatchingSuperReg(VRM->getPhys(Paired), AMDGPU::lo16, in getRegAllocationHints()
3979 if (MCPhysReg Super = getMatchingSuperReg(Reg, AMDGPU::lo16, &RC)) in get32BitRegister()
3982 if (MCPhysReg Super = getMatchingSuperReg(Reg, AMDGPU::hi16, in get32BitRegister()
H A DSIFrameLowering.cpp1787 TRI->getMatchingSuperReg(Reg, AMDGPU::sub0, BlockRegClass); in assignSlotsUsingVGPRBlocks()
1796 TRI->getMatchingSuperReg(LastBlockStart, AMDGPU::sub0, BlockRegClass); in assignSlotsUsingVGPRBlocks()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVExpandPseudoInsts.cpp297 Register DstReg = TRI->getMatchingSuperReg( in expandMV_FPR16INX()
299 Register SrcReg = TRI->getMatchingSuperReg( in expandMV_FPR16INX()
314 Register DstReg = TRI->getMatchingSuperReg( in expandMV_FPR32INX()
316 Register SrcReg = TRI->getMatchingSuperReg( in expandMV_FPR32INX()
H A DRISCVAsmPrinter.cpp1131 TRI->getMatchingSuperReg(Reg, RISCV::sub_16, &RISCV::FPR32RegClass); in lowerRISCVVMachineInstrToMCInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/
H A DRISCVDisassembler.cpp243 MCRegister Reg = RI->getMatchingSuperReg( in DecodeGPRPairRegisterClass()
259 MCRegister Reg = RI->getMatchingSuperReg( in DecodeGPRPairCRegisterClass()
298 RI->getMatchingSuperReg(RISCV::V0 + RegNo, RISCV::sub_vrm1_0, in DecodeVRM2RegisterClass()
315 RI->getMatchingSuperReg(RISCV::V0 + RegNo, RISCV::sub_vrm1_0, in DecodeVRM4RegisterClass()
332 RI->getMatchingSuperReg(RISCV::V0 + RegNo, RISCV::sub_vrm1_0, in DecodeVRM8RegisterClass()
/freebsd/contrib/llvm-project/llvm/lib/MC/
H A DMCRegisterInfo.cpp108 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg() function in MCRegisterInfo
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h666 MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg() function
668 return MCRegisterInfo::getMatchingSuperReg(Reg, SubIdx, RC->MC); in getMatchingSuperReg()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCalcSpillWeights.cpp75 return TRI.getMatchingSuperReg(CopiedPReg, Sub, RC); in copyHint()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZShortenInst.cpp86 TRI->getMatchingSuperReg(Reg, thisSubRegIdx, &SystemZ::GR64BitRegClass); in shortenIIF()
H A DSystemZRegisterInfo.cpp115 PhysReg = getMatchingSuperReg(PhysReg, VRRegMO->getSubReg(), in getRegAllocationHints()
H A DSystemZInstrInfo.cpp911 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_h64), in copyPhysReg()
914 RI.getMatchingSuperReg(RI.getSubReg(SrcReg, SystemZ::subreg_l64), in copyPhysReg()
925 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_h64), in copyPhysReg()
928 RI.getMatchingSuperReg(RI.getSubReg(DestReg, SystemZ::subreg_l64), in copyPhysReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMFrameLowering.cpp2021 TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, &ARM::QQPRRegClass); in emitAlignedDPRCS2Spills()
2040 TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, &ARM::QQPRRegClass); in emitAlignedDPRCS2Spills()
2055 TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, &ARM::QPRRegClass); in emitAlignedDPRCS2Spills()
2153 TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, &ARM::QQPRRegClass); in emitAlignedDPRCS2Restores()
2171 TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, &ARM::QQPRRegClass); in emitAlignedDPRCS2Restores()
2184 TRI->getMatchingSuperReg(NextReg, ARM::dsub_0, &ARM::QPRRegClass); in emitAlignedDPRCS2Restores()
H A DA15SDOptimizer.cpp146 TRI->getMatchingSuperReg(SReg, ARM::ssub_1, &ARM::DPRRegClass); in getDPRLaneFromSPR()
/freebsd/contrib/llvm-project/llvm/include/llvm/MC/
H A DMCRegisterInfo.h386 MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx,
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcAsmPrinter.cpp449 MOReg = RegisterInfo->getMatchingSuperReg(MOReg, SP::sub_even, in PrintAsmOperand()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64InstrInfo.cpp5051 MCRegister DestRegX = TRI->getMatchingSuperReg( in copyPhysReg()
5053 MCRegister SrcRegX = TRI->getMatchingSuperReg( in copyPhysReg()
5078 MCRegister DestRegX = TRI->getMatchingSuperReg( in copyPhysReg()
5080 MCRegister SrcRegX = TRI->getMatchingSuperReg( in copyPhysReg()
5318 MCRegister DestRegD = TRI->getMatchingSuperReg(DestReg, AArch64::ssub, in copyPhysReg()
5320 MCRegister SrcRegD = TRI->getMatchingSuperReg(SrcReg, AArch64::ssub, in copyPhysReg()
5341 MCRegister DestRegD = TRI->getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
5343 MCRegister SrcRegD = TRI->getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg()
5353 DestReg = RI.getMatchingSuperReg(DestReg, AArch64::hsub, in copyPhysReg()
5355 SrcReg = RI.getMatchingSuperReg(SrcReg, AArch64::hsub, in copyPhysReg()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/AsmParser/
H A DAVRAsmParser.cpp83 return MRI->getMatchingSuperReg(Reg, From, Class); in toDREG()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonCopyToCombine.cpp589 MCRegister DoubleRegDest = TRI->getMatchingSuperReg(LoRegDef, SubLo, SuperRC); in combine()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.cpp579 Opd.setReg(getRegisterInfo().getMatchingSuperReg( in ExpandCCR()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp1270 NewVdata = MRI.getMatchingSuperReg(Vdata0, AMDGPU::sub0, in convertMIMGInst()
1290 NewVAddrSA = MRI.getMatchingSuperReg(VAddrSA, AMDGPU::sub0, in convertMIMGInst()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/MCTargetDesc/
H A DAArch64InstPrinter.cpp866 Rm = MRI.getMatchingSuperReg(Rm, AArch64::sub_32, in printRangePrefetchAlias()
1709 Reg = MRI.getMatchingSuperReg(Reg, AArch64::dsub, &FPR128RC); in printVectorList()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/
H A DRISCVAsmParser.cpp1302 return RI.getMatchingSuperReg(Reg, RISCV::sub_vrm1_0, in convertVRToVRMx()
2506 MCRegister Pair = RI->getMatchingSuperReg( in parseGPRPairAsFPR64()
2548 MCRegister Pair = RI->getMatchingSuperReg( in parseGPRPair()

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