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Searched refs:getInterval (Results 1 – 25 of 45) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp112 LIS->getInterval(MI.getOperand(1).getReg()).Query(FMAIdx).valueIn(); in processBlock()
192 if (LIS->getInterval(Reg2).Query(FMAIdx).isKill() in processBlock()
196 } else if (LIS->getInterval(Reg3).Query(FMAIdx).isKill() in processBlock()
213 !LIS->getInterval(AddendSrcReg).liveAt(FMAIdx)) in processBlock()
281 LiveInterval &FMAInt = LIS->getInterval(OldFMAReg); in processBlock()
299 LiveInterval &NewFMAInt = LIS->getInterval(KilledProdReg); in processBlock()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveRangeEdit.cpp47 LiveInterval &OldLI = LIS.getInterval(OldReg); in createEmptyIntervalFrom()
67 LIS.getInterval(VReg).markNotSpillable(); in createFrom()
86 LiveInterval &OrigLI = LIS.getInterval(Original); in scanRemattable()
123 LiveInterval &li = LIS.getInterval(MO.getReg()); in allUsesAvailableAt()
324 LiveInterval &OrigLI = LIS.getInterval(Original); in eliminateDeadDef()
349 LiveInterval &LI = LIS.getInterval(Reg); in eliminateDeadDef()
431 ToShrink.remove(&LIS.getInterval(Reg)); in eliminateDeadDef()
499 LiveInterval &LI = LIS.getInterval(get(I)); in calculateRegClassAndHint()
H A DInlineSpiller.cpp313 LIS.getInterval(MO.getReg()); in getVDefInterval()
398 LiveInterval &SnipLI = LIS.getInterval(SnipReg); in collectRegsToSpill()
442 LiveInterval &SrcLI = LIS.getInterval(SrcReg); in hoistSpillInsideBB()
453 LiveInterval &OrigLI = LIS.getInterval(Original); in hoistSpillInsideBB()
527 LiveInterval &DstLI = LIS.getInterval(DstReg); in eliminateRedundantSpills()
580 LiveInterval &SnipLI = LIS.getInterval(MI->getOperand(1).getReg()); in markValueUsed()
646 LiveInterval &OrigLI = LIS.getInterval(Original); in reMaterializeFor()
723 LiveInterval &LI = LIS.getInterval(Reg); in reMaterializeAll()
740 LiveInterval &LI = LIS.getInterval(Reg); in reMaterializeAll()
803 (!LIS.getInterval(Reg).empty() || !MRI.reg_nodbg_empty(Reg)) && in reMaterializeAll()
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H A DSplitKit.cpp336 const LiveInterval &Orig = LIS.getInterval(OrigReg); in isOriginalEndpoint()
478 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); in defValue()
521 addDeadDef(LIS.getInterval(Edit->get(RegIdx)), VNI, false); in forceRecompute()
562 LiveInterval &DestLI = LIS.getInterval(Edit->get(RegIdx)); in buildCopy()
596 LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx)); in defFromParent()
604 LiveInterval &OrigLI = LIS.getInterval(Original); in defFromParent()
810 Register Reg = LIS.getInterval(Edit->get(RegIdx)).reg(); in leaveIntvAtTop()
855 LiveInterval *LI = &LIS.getInterval(Edit->get(0)); in removeBackCopies()
962 LiveInterval *LI = &LIS.getInterval(Edit->get(0)); in computeRedundantBackCopies()
1015 LiveInterval *LI = &LIS.getInterval(Edit->get(0)); in hoistCopies()
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H A DRegisterCoalescer.cpp621 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); in adjustCopiesBackFrom()
623 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); in adjustCopiesBackFrom()
810 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); in removeCopyByCommutingDef()
812 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); in removeCopyByCommutingDef()
1104 LIS->getInterval(CP.isFlipped() ? CP.getDstReg() : CP.getSrcReg()); in removePartialRedundancy()
1106 LIS->getInterval(CP.isFlipped() ? CP.getSrcReg() : CP.getDstReg()); in removePartialRedundancy()
1298 LiveInterval &SrcInt = LIS->getInterval(SrcReg); in reMaterializeTrivialDef()
1490 LiveInterval &DstInt = LIS->getInterval(DstReg); in reMaterializeTrivialDef()
1687 const LiveInterval &SrcLI = LIS->getInterval(SrcReg); in eliminateUndefCopy()
1702 LiveInterval &DstLI = LIS->getInterval(DstReg); in eliminateUndefCopy()
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H A DRegAllocBase.cpp79 enqueue(&LIS->getInterval(Reg)); in seedLiveRegs()
147 LiveInterval *SplitVirtReg = &LIS->getInterval(Reg); in allocatePhysRegs()
H A DCalcSpillWeights.cpp43 calculateSpillWeightAndHint(LIS.getInterval(Reg)); in calculateSpillWeightsAndHints()
116 const LiveInterval &SrcLI = LIS.getInterval(Reg); in isRematerializable()
176 const LiveInterval &OrigInt = LIS.getInterval(Original); in weightCalcHelper()
H A DRegAllocPBQP.cpp201 LIS.getInterval(G.getNodeMetadata(NId).getVReg()).weight(); in apply()
334 LiveInterval &LI = LIS.getInterval(VReg); in apply()
607 LiveInterval &VRegLI = LIS.getInterval(VReg); in initializeGraph()
666 if (LIS.getInterval(VReg).empty()) { in initializeGraph()
695 LiveRangeEdit LRE(&LIS.getInterval(VReg), NewIntervals, MF, LIS, &VRM, in spillVReg()
707 const LiveInterval &LI = LIS.getInterval(R); in spillVReg()
762 LiveInterval &LI = LIS.getInterval(R); in finalizeAlloc()
H A DTwoAddressInstructionPass.cpp406 return isPlainlyKilled(MI, LIS->getInterval(Reg)); in isPlainlyKilled()
923 LiveInterval &LI = LIS->getInterval(Reg); in rescheduleMIBelowKill()
1111 LiveInterval &LI = LIS->getInterval(Reg); in rescheduleKillAboveMI()
1631 LiveInterval &LI = LIS->getInterval(RegA); in processTiedPairs()
1713 LiveInterval &LI = LIS->getInterval(RegB); in processTiedPairs()
1769 const auto &UseLI = LIS->getInterval(RegB); in processStatepoint()
1770 const auto &DefLI = LIS->getInterval(RegA); in processStatepoint()
1798 LiveInterval &LI = LIS->getInterval(RegB); in processStatepoint()
1799 LiveInterval &Other = LIS->getInterval(RegA); in processStatepoint()
1932 LiveInterval &LI = LIS->getInterval(Reg); in run()
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H A DRegAllocBasic.cpp147 LiveInterval &LI = LIS->getInterval(VirtReg); in INITIALIZE_PASS_DEPENDENCY()
166 LiveInterval &LI = LIS->getInterval(VirtReg); in LRE_WillShrinkVirtReg()
H A DPHIElimination.cpp477 LiveInterval &DestLI = LIS->getInterval(DestReg); in LowerPHINode()
670 LiveInterval &SrcLI = LIS->getInterval(SrcReg); in LowerPHINode()
838 return LIS->isLiveInToMBB(LIS->getInterval(Reg), MBB); in isLiveIn()
853 const LiveInterval &LI = LIS->getInterval(Reg); in isLiveOutPastPHIs()
H A DLiveIntervals.cpp181 OS << getInterval(Reg) << '\n'; in print()
409 const LiveInterval &LI = getInterval(Reg); in extendSegmentsToUses()
719 const LiveInterval &LI = getInterval(Reg); in addKillFlags()
1042 LiveInterval &LI = LIS.getInterval(Reg); in updateAllRanges()
1569 LiveInterval &LI = getInterval(Reg); in handleMoveIntoNewBundle()
1695 LiveInterval &LI = getInterval(Reg); in repairIntervalsInRange()
1727 LiveInterval &LI = getInterval(Reg); in repairIntervalsInRange()
H A DRegAllocGreedy.cpp235 LiveInterval &LI = LIS->getInterval(VirtReg); in LRE_CanEraseVirtReg()
254 LiveInterval &LI = LIS->getInterval(VirtReg); in LRE_WillShrinkVirtReg()
387 LiveInterval *LI = &LIS->getInterval(~CurQueue.top().second); in dequeue()
1027 const LiveInterval &Reg = LIS->getInterval(LREdit.get(I)); in splitAroundRegion()
1320 const LiveInterval &LI = LIS->getInterval(LREdit.get(I)); in tryBlockSplit()
1781 ExtraInfo->setStage(LIS->getInterval(LREdit.get(I)), RS_Split2); in tryLocalSplit()
2062 if (RecoloringCandidates.count(&LIS->getInterval(R))) in tryLastChanceRecoloring()
2316 LiveInterval &LI = LIS->getInterval(Reg); in tryHintRecoloring()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64PBQPRegAlloc.cpp181 const LiveInterval &ld = LIs.getInterval(Rd); in addIntraChainConstraint()
182 const LiveInterval &la = LIs.getInterval(Ra); in addIntraChainConstraint()
257 const LiveInterval &ld = LIs.getInterval(Rd); in addInterChainConstraint()
263 const LiveInterval &lr = LIs.getInterval(r); in addInterChainConstraint()
316 const LiveInterval &LI = LIs.getInterval(reg); in regJustKilledBefore()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveStacks.h68 LiveInterval &getInterval(int Slot) { in getInterval() function
75 const LiveInterval &getInterval(int Slot) const { in getInterval() function
H A DLiveIntervals.h125 LiveInterval &getInterval(Register Reg) { in getInterval() function
132 const LiveInterval &getInterval(Register Reg) const { in getInterval() function
133 return const_cast<LiveIntervals *>(this)->getInterval(Reg); in getInterval()
158 return hasInterval(Reg) ? getInterval(Reg) : createEmptyInterval(Reg); in getOrCreateEmptyInterval()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyOptimizeLiveIntervals.cpp96 LIS.splitSeparateComponents(LIS.getInterval(Reg), SplitLIs); in runOnMachineFunction()
116 LiveInterval &LI = LIS.getInterval(MI.getOperand(0).getReg()); in runOnMachineFunction()
H A DWebAssemblyMemIntrinsicResults.cpp91 LiveInterval *FromLI = &LIS.getInterval(FromReg); in replaceDominatedUses()
92 LiveInterval *ToLI = &LIS.getInterval(ToReg); in replaceDominatedUses()
H A DWebAssemblyRegStackify.cpp273 if (const VNInfo *ValNo = LIS.getInterval(Reg).getVNInfoBefore( in getVRegDef()
291 const LiveInterval &LI = LIS.getInterval(Reg); in hasOneNonDBGUse()
441 const LiveInterval &LI = LIS.getInterval(Reg); in oneUseDominatesOtherUses()
549 LiveInterval &LI = LIS.getInterval(Reg); in moveForSingleUse()
597 LiveInterval &LI = LIS.getInterval(Reg); in rematerializeCheapDef()
662 LiveInterval &LI = LIS.getInterval(Reg); in moveAndTeeForMultiUse()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp388 return !any_of(LIS.getInterval(DstReg), HasCall) && in shouldCoalesce()
389 !any_of(LIS.getInterval(SrcReg), HasCall); in shouldCoalesce()
397 return any_of(LIS.getInterval(LargeReg), HasCall) || in shouldCoalesce()
398 !any_of(LIS.getInterval(SmallReg), HasCall); in shouldCoalesce()
H A DHexagonExpandCondsets.cpp337 LiveInterval &LI = LIS->getInterval(Reg); in updateKillFlags()
429 LiveInterval &LI = LIS->getInterval(Reg); in updateDeadsInRange()
530 LiveInterval &LI = LIS->getInterval(Reg); in updateDeadFlags()
575 LIS->getInterval(R).verify(); in updateLiveness()
585 LiveInterval &LI = LIS->getInterval(R); in distributeLiveIntervals()
1159 LiveInterval &L1 = LIS->getInterval(R1.Reg); in coalesceRegisters()
1160 LiveInterval &L2 = LIS->getInterval(R2.Reg); in coalesceRegisters()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIOptimizeExecMaskingPreRA.cpp97 return isDefBetween(LIS->getInterval(Reg), AndIdx, SelIdx); in isDefBetween()
190 LiveInterval *SelLI = &LIS->getInterval(SelReg); in optimizeVcndVcmpPair()
221 LiveInterval &CCLI = LIS->getInterval(CCReg); in optimizeVcndVcmpPair()
232 LiveInterval *CmpLI = CmpReg.isVirtual() ? &LIS->getInterval(CmpReg) : nullptr; in optimizeVcndVcmpPair()
H A DGCNRegPressure.cpp275 auto &LI = LIS.getInterval(Reg); in collectVirtualRegUses()
297 return getLiveLaneMask(LIS.getInterval(Reg), SI, MRI); in getLiveLaneMask()
454 const LiveInterval &LI = LIS.getInterval(MO.getReg()); in advanceBeforeNext()
613 const LiveInterval &LI = LIS.getInterval(Reg); in getRegLiveThroughMask()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp54 auto &LI = LIS->getInterval(Reg); in getVNInfoFromReg()
1146 LiveInterval &LI = LIS->getInterval(AVLReg); in insertVSETVLI()
1274 auto &LI = LIS->getInterval(MI.getOperand(1).getReg()); in transferAfter()
1379 const LiveRange &LR = LIS->getInterval(Require.getAVLReg()); in needVSETVLIPHI()
1454 LiveInterval &LI = LIS->getInterval(Reg); in emitVSETVLIs()
1652 LIS->shrinkToUses(&LIS->getInterval(OldVLReg)); in coalesceVSETVLIs()
1696 LiveInterval &DefLI = LIS->getInterval(DefReg); in coalesceVSETVLIs()
1757 LiveInterval &DefLI = LIS->getInterval(VLOutput); in insertReadVL()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86TileConfig.cpp197 LIS.extendToIndices(LIS.getInterval(R), {SIdx.getRegSlot()}); in INITIALIZE_PASS_DEPENDENCY()

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