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Searched refs:getExtensionType (Results 1 – 25 of 47) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h1510 ISD::LoadExtType getExtensionType() const {
2445 ISD::LoadExtType getExtensionType() const {
2580 ISD::LoadExtType getExtensionType() const {
2609 ISD::LoadExtType getExtensionType() const {
2752 ISD::LoadExtType getExtensionType() const {
2941 ISD::LoadExtType getExtensionType() const {
3178 return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD &&
3185 return Ld && Ld->getExtensionType() == ISD::NON_EXTLOAD;
3191 return Ld && Ld->getExtensionType() == ISD::EXTLOAD;
3197 return Ld && Ld->getExtensionType() == ISD::SEXTLOAD;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp772 switch (LD->getExtensionType()) { in print_details()
804 switch (MLd->getExtensionType()) { in print_details()
841 switch (MGather->getExtensionType()) { in print_details()
873 switch (A->getExtensionType()) { in print_details()
H A DLegalizeFloatTypes.cpp852 if (L->getExtensionType() == ISD::NON_EXTLOAD) { in SoftenFloatRes_LOAD()
853 NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), NVT, dl, in SoftenFloatRes_LOAD()
881 if (L->getExtensionType() == ISD::NON_EXTLOAD) { in SoftenFloatRes_ATOMIC_LOAD()
1930 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr, in ExpandFloatRes_LOAD()
2888 L->getAddressingMode(), L->getExtensionType(), IVT, SDLoc(N), in PromoteFloatRes_LOAD()
3268 assert(L->getExtensionType() == ISD::NON_EXTLOAD && "Unexpected extension!"); in SoftPromoteHalfRes_LOAD()
3270 DAG.getLoad(L->getAddressingMode(), L->getExtensionType(), MVT::i16, in SoftPromoteHalfRes_LOAD()
H A DDAGCombiner.cpp1435 : LD->getExtensionType(); in PromoteOperand()
1672 : LD->getExtensionType(); in PromoteLoad()
6522 if (Load->getExtensionType() != ISD::NON_EXTLOAD && in isLegalNarrowLdSt()
6572 if (Load->getExtensionType() == ISD::ZEXTLOAD && in SearchForAndLoads()
6979 if (MLoad && MLoad->getExtensionType() == ISD::EXTLOAD && Splat && in visitAND()
7143 switch (Load->getExtensionType()) { in visitAND()
7158 if (Load->getExtensionType() == ISD::EXTLOAD) { in visitAND()
8804 return L->getExtensionType() == ISD::ZEXTLOAD in calculateByteProvider()
12149 Ops, MGT->getMemOperand(), IndexType, MGT->getExtensionType()); in visitMGATHER()
12156 Ops, MGT->getMemOperand(), IndexType, MGT->getExtensionType()); in visitMGATHER()
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H A DLegalizeVectorTypes.cpp454 ISD::UNINDEXED, N->getExtensionType(), in ScalarizeVecRes_LOAD()
2035 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_LOAD()
2081 ISD::LoadExtType ExtType = LD->getExtensionType(); in SplitVecRes_VP_LOAD()
2189 SLD->getAddressingMode(), SLD->getExtensionType(), LoVT, DL, in SplitVecRes_VP_STRIDED_LOAD()
2220 Hi = DAG.getStridedLoadVP(SLD->getAddressingMode(), SLD->getExtensionType(), in SplitVecRes_VP_STRIDED_LOAD()
2250 ISD::LoadExtType ExtType = MLD->getExtensionType(); in SplitVecRes_MLOAD()
2376 ISD::LoadExtType ExtType = MGT->getExtensionType(); in SplitVecRes_Gather()
5657 ISD::LoadExtType ExtType = LD->getExtensionType(); in WidenVecRes_LOAD()
5733 ISD::LoadExtType ExtType = N->getExtensionType(); in WidenVecRes_VP_LOAD()
5772 N->getAddressingMode(), N->getExtensionType(), WidenV in WidenVecRes_VP_STRIDED_LOAD()
[all...]
H A DLegalizeIntegerTypes.cpp374 ISD::LoadExtType ETy = cast<AtomicSDNode>(N)->getExtensionType(); in PromoteIntRes_Atomic0()
947 ISD::isNON_EXTLoad(N) ? ISD::EXTLOAD : N->getExtensionType(); in PromoteIntRes_LOAD()
962 ISD::LoadExtType ExtType = N->getExtensionType(); in PromoteIntRes_MLOAD()
984 ISD::LoadExtType ExtType = N->getExtensionType(); in PromoteIntRes_MGATHER()
4059 ISD::LoadExtType ExtType = N->getExtensionType(); in ExpandIntRes_LOAD()
/freebsd/contrib/llvm-project/llvm/include/llvm/Target/
H A DTargetSelectionDAG.td940 // cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD
942 // cast<LoadSDNode>(N)->getExtensionType() == ISD::EXTLOAD;
944 // cast<LoadSDNode>(N)->getExtensionType() == ISD::SEXTLOAD;
946 // cast<LoadSDNode>(N)->getExtensionType() == ISD::ZEXTLOAD;
1862 return cast<MaskedGatherSDNode>(N)->getExtensionType() == ISD::NON_EXTLOAD;
1870 return MGN->getExtensionType() == ISD::EXTLOAD &&
1877 return MGN->getExtensionType() == ISD::EXTLOAD &&
1884 return MGN->getExtensionType() == ISD::EXTLOAD &&
1893 return MGN->getExtensionType() == ISD::SEXTLOAD &&
1900 return MGN->getExtensionType() == ISD::SEXTLOAD &&
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp149 if ((LD->getExtensionType() != ISD::NON_EXTLOAD) || in selectIndexedLoad()
192 if (LD->getExtensionType() != ISD::NON_EXTLOAD || in selectIndexedProgMemLoad()
H A DAVRISelLowering.cpp1082 if (LD->getExtensionType() != ISD::NON_EXTLOAD) in getPreIndexedAddressParts()
1137 if (LD->getExtensionType() != ISD::NON_EXTLOAD) in getPostIndexedAddressParts()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstrFragments.td503 ISD::LoadExtType ExtType = LD->getExtensionType();
512 ISD::LoadExtType ExtType = LD->getExtensionType();
522 ISD::LoadExtType ExtType = LD->getExtensionType();
578 ISD::LoadExtType ExtType = LD->getExtensionType();
/freebsd/contrib/llvm-project/llvm/lib/TargetParser/
H A DRISCVISAInfo.cpp220 static StringRef getExtensionType(StringRef Ext) { in getExtensionType() function
684 StringRef Type = getExtensionType(Ext); in parseArchString()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp1024 (Load->getExtensionType() == ISD::EXTLOAD || in tryRISBGZero()
1025 Load->getExtensionType() == ISD::ZEXTLOAD) && in tryRISBGZero()
1568 ETy = L->getExtensionType(); in getLoadExtType()
1570 ETy = AL->getExtensionType(); in getLoadExtType()
H A DSystemZOperators.td546 if (AL->getExtensionType() != ISD::NON_EXTLOAD)
644 return cast<LoadSDNode>(N)->getExtensionType() != ISD::NON_EXTLOAD;
/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp310 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD) in isValidIndexedLoad()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1265 ISD::LoadExtType ExtType = Load->getExtensionType(); in lowerPrivateExtLoad()
1321 ISD::LoadExtType ExtType = LoadNode->getExtensionType(); in LowerLOAD()
1344 ((LoadNode->getExtensionType() == ISD::NON_EXTLOAD) || in LowerLOAD()
1345 (LoadNode->getExtensionType() == ISD::ZEXTLOAD))) { in LowerLOAD()
1379 if (LoadNode->getExtensionType() == ISD::SEXTLOAD) { in LowerLOAD()
H A DR600Instructions.td306 return L->getExtensionType() == ISD::ZEXTLOAD ||
307 L->getExtensionType() == ISD::EXTLOAD;
H A DAMDGPUISelLowering.cpp1053 return LHS0 && LHS1 && RHSLd && LHS0->getExtensionType() == ISD::ZEXTLOAD && in isDesirableToCommuteWithShift()
1055 RHSLd->getExtensionType() == ISD::ZEXTLOAD; in isDesirableToCommuteWithShift()
1799 SDValue LoLoad = DAG.getExtLoad(Load->getExtensionType(), SL, LoVT, in SplitVectorLoad()
1804 DAG.getExtLoad(Load->getExtensionType(), SL, HiVT, Load->getChain(), in SplitVectorLoad()
1852 Load->getExtensionType(), SL, WideVT, Load->getChain(), BasePtr, SrcValue, in WidenOrSplitVectorLoad()
H A DSIISelLowering.cpp10196 assert((!MemVT.isVector() || Ld->getExtensionType() == ISD::NON_EXTLOAD) && in widenLoad()
10209 assert(Ld->getExtensionType() == ISD::NON_EXTLOAD && in widenLoad()
10215 if (Ld->getExtensionType() == ISD::SEXTLOAD) { in widenLoad()
10218 } else if (Ld->getExtensionType() == ISD::ZEXTLOAD || in widenLoad()
10219 Ld->getExtensionType() == ISD::NON_EXTLOAD) { in widenLoad()
10222 assert(Ld->getExtensionType() == ISD::EXTLOAD); in widenLoad()
10232 Cvt = getLoadExtOrTrunc(DAG, Ld->getExtensionType(), Cvt, SL, IntVT); in widenLoad()
10252 ISD::LoadExtType ExtType = Load->getExtensionType(); in LowerLOAD()
11998 return L->getExtensionType() == ISD::ZEXTLOAD in calculateByteProvider()
12072 auto ExtType = cast<LoadSDNode>(L)->getExtensionType(); in isExtendedFrom16Bits()
H A DAMDGPUISelDAGToDAG.cpp246 LoadOp = LdHi->getExtensionType() == ISD::SEXTLOAD ? in matchLoadD16FromBuildVector()
274 LoadOp = LdLo->getExtensionType() == ISD::SEXTLOAD ? in matchLoadD16FromBuildVector()
/freebsd/contrib/llvm-project/llvm/lib/Target/M68k/
H A DM68kInstrInfo.td526 ISD::LoadExtType ExtType = LD->getExtensionType();
536 ISD::LoadExtType ExtType = LD->getExtensionType();
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp86 ISD::LoadExtType ExtType = LD->getExtensionType(); in INITIALIZE_PASS()
305 if (N->getExtensionType() != IntExt) in tryLoadOfLoadIntrinsic()
1626 if (L->getExtensionType() != ISD::SEXTLOAD) in DetectUseSxtw()
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMISelDAGToDAG.cpp1622 Opcode = (LD->getExtensionType() == ISD::SEXTLOAD) in tryARMIndexedLoad()
1626 if (LD->getExtensionType() == ISD::SEXTLOAD) { in tryARMIndexedLoad()
1678 if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD || in tryT1IndexedLoad()
1708 bool isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryT2IndexedLoad()
1773 isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryMVEIndexedLoad()
1789 isSExtLd = LD->getExtensionType() == ISD::SEXTLOAD; in tryMVEIndexedLoad()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelDAGToDAG.cpp832 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in tryTLSXFormLoad()
3161 if (InputLoad && InputLoad->getExtensionType() == ISD::SEXTLOAD) in signExtendInputIfNeeded()
3200 if (InputLoad && InputLoad->getExtensionType() != ISD::SEXTLOAD) in zeroExtendInputIfNeeded()
5570 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in Select()
5607 bool isSExt = LD->getExtensionType() == ISD::SEXTLOAD; in Select()
H A DPPCISelLowering.cpp3120 LD->getExtensionType() == ISD::SEXTLOAD && in getPreIndexedAddressParts()
8557 if (!LD || LD->getExtensionType() != ET || LD->isVolatile() || in canReuseLoadAddress()
14656 return LD->getExtensionType() == ISD::EXTLOAD && in isFPExtLoad()
14775 IsRoundOfExtLoad = FirstLoad->getExtensionType() == ISD::EXTLOAD; in combineBVOfConsecutiveLoads()
14803 if (IsRoundOfExtLoad && LD2->getExtensionType() != ISD::EXTLOAD) in combineBVOfConsecutiveLoads()
15013 (LD->getExtensionType() != ISD::ZEXTLOAD && in combineBVZEXTLOAD()
15014 LD->getExtensionType() != ISD::EXTLOAD)) in combineBVZEXTLOAD()
15967 if (LD->getExtensionType() != ISD::NON_EXTLOAD || in PerformDAGCombine()
17410 (LD->getExtensionType() == ISD::NON_EXTLOAD || in isZExtFree()
17411 LD->getExtensionType() == ISD::ZEXTLOAD)) in isZExtFree()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelDAGToDAG.cpp966 if (PlainLoad && (PlainLoad->getExtensionType() == ISD::SEXTLOAD)) in tryLoad()
3879 bool IsSigned = LdNode && LdNode->getExtensionType() == ISD::SEXTLOAD; in GetConvertOpcode()

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