/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeDAG.cpp | 356 SDValue Result = DAG.getExtLoad( in ExpandConstantFP() 742 SDValue Result = DAG.getExtLoad(NewExtType, dl, Node->getValueType(0), in LegalizeLoadOps() 782 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps() 790 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps() 811 Hi = DAG.getExtLoad(ExtType, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps() 819 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, Node->getValueType(0), Chain, Ptr, in LegalizeLoadOps() 882 SDValue Load = DAG.getExtLoad(MidExtType, dl, LoadVT, Chain, Ptr, in LegalizeLoadOps() 901 SDValue Result = DAG.getExtLoad(ISD::ZEXTLOAD, dl, ILoadVT, Chain, in LegalizeLoadOps() 922 SDValue Result = DAG.getExtLoad(ISD::EXTLOAD, dl, in LegalizeLoadOps() 1442 NewLoad = DAG.getExtLoad(ISD::EXTLOAD, dl, Op.getValueType(), Ch, StackPtr, in ExpandExtractFromVectorThroughStack() [all …]
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H A D | DAGCombiner.cpp | 1437 return DAG.getExtLoad(ExtType, DL, PVT, in PromoteOperand() 1673 SDValue NewLD = DAG.getExtLoad(ExtType, DL, PVT, in PromoteLoad() 7296 DAG.getExtLoad(ISD::ZEXTLOAD, SDLoc(N0), VT, LN0->getChain(), in visitAND() 9268 DAG.getExtLoad(NeedsZext ? ISD::ZEXTLOAD : ISD::NON_EXTLOAD, SDLoc(N), VT, in MatchLoadCombine() 13101 DAG.getExtLoad(ExtType, SDLoc(LN0), SplitDstVT, LN0->getChain(), in CombineExtLoad() 13176 SDValue ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, SDLoc(Load), VT, in CombineZExtLogicopShiftLoad() 13271 DAG.getExtLoad(ExtLoadType, SDLoc(LN0), VT, LN0->getChain(), in tryToFoldExtOfExtload() 13327 SDValue ExtLoad = DAG.getExtLoad(ExtLoadType, SDLoc(LN0), VT, LN0->getChain(), in tryToFoldExtOfLoad() 13694 SDValue ExtLoad = DAG.getExtLoad(ISD::SEXTLOAD, SDLoc(LN00), VT, in visitSIGN_EXTEND() 14022 SDValue ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, SDLoc(LN00), VT, in visitZERO_EXTEND() [all …]
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H A D | TargetLowering.cpp | 9083 SDValue ExtLoad = DAG.getExtLoad(ISD::ZEXTLOAD, DL, VT, DAG.getEntryNode(), in CTTZTableLookup() 9656 DAG.getExtLoad(ISD::EXTLOAD, SL, LoadVT, Chain, BasePTR, in scalarizeVectorLoad() 9691 DAG.getExtLoad(ExtType, SL, DstEltVT, Chain, BasePTR, in scalarizeVectorLoad() 9859 DAG.getExtLoad(ISD::EXTLOAD, dl, RegVT, Chain, Ptr, in expandUnalignedLoad() 9874 Load = DAG.getExtLoad(LD->getExtensionType(), dl, VT, TF, StackBase, in expandUnalignedLoad() 9903 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, LD->getPointerInfo(), in expandUnalignedLoad() 9908 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, in expandUnalignedLoad() 9913 Hi = DAG.getExtLoad(HiExtType, dl, VT, Chain, Ptr, LD->getPointerInfo(), in expandUnalignedLoad() 9918 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, VT, Chain, Ptr, in expandUnalignedLoad() 10015 SDValue Load = DAG.getExtLoad( in expandUnalignedStore()
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H A D | LegalizeIntegerTypes.cpp | 949 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_LOAD() 4069 Lo = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), MemVT, in ExpandIntRes_LOAD() 4102 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, in ExpandIntRes_LOAD() 4119 Hi = DAG.getExtLoad(ExtType, dl, NVT, Ch, Ptr, N->getPointerInfo(), in ExpandIntRes_LOAD() 4127 Lo = DAG.getExtLoad(ISD::ZEXTLOAD, dl, NVT, Ch, Ptr, in ExpandIntRes_LOAD()
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H A D | LegalizeVectorTypes.cpp | 3594 return DAG.getExtLoad( in SplitVecOp_EXTRACT_VECTOR_ELT() 7603 DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, LD->getPointerInfo(), in GenWidenVectorExtLoads() 7610 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr, in GenWidenVectorExtLoads()
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H A D | SelectionDAG.cpp | 7941 Value = DAG.getExtLoad( in getMemcpyLoadsAndStores() 8966 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, in getExtLoad() function in SelectionDAG 8977 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, in getExtLoad() function in SelectionDAG
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H A D | LegalizeFloatTypes.cpp | 1930 Hi = DAG.getExtLoad(LD->getExtensionType(), dl, NVT, Chain, Ptr, in ExpandFloatRes_LOAD()
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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 438 SDValue Low = DAG.getExtLoad(ISD::ZEXTLOAD, DL, MVT::i32, Chain, BasePtr, in LowerLOAD() 444 DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, HighAddr, in LowerLOAD()
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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAG.h | 1373 getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT, SDValue Chain, 1378 SDValue getExtLoad(ISD::LoadExtType ExtType, const SDLoc &dl, EVT VT,
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/freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/ |
H A D | CSKYISelLowering.cpp | 282 Val = DAG.getExtLoad( in unpackFromMemLoc()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 1381 SDValue NewLoad = DAG.getExtLoad( in LowerLOAD()
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H A D | AMDGPUISelLowering.cpp | 1799 SDValue LoLoad = DAG.getExtLoad(Load->getExtensionType(), SL, LoVT, in SplitVectorLoad() 1804 DAG.getExtLoad(Load->getExtensionType(), SL, HiVT, Load->getChain(), in SplitVectorLoad() 1851 SDValue WideLoad = DAG.getExtLoad( in WidenOrSplitVectorLoad()
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H A D | SIISelLowering.cpp | 2125 ArgValue = DAG.getExtLoad( in lowerStackParameter() 10268 SDValue NewLD = DAG.getExtLoad(ISD::EXTLOAD, DL, MVT::i32, Chain, in LowerLOAD()
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 3814 SDValue GprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain, in LowerVAARG() 3836 SDValue FprIndex = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i32, InChain, in LowerVAARG() 6481 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, Arg, in LowerCall_64SVR4() 6553 SDValue Load = DAG.getExtLoad(ISD::EXTLOAD, dl, PtrVT, Chain, AddArg, in LowerCall_64SVR4() 7561 return DAG.getExtLoad(ISD::ZEXTLOAD, dl, PtrVT, Chain, in LowerCall_AIX() 8040 DAG.getExtLoad(ISD::EXTLOAD, dl, getPointerTy(DAG.getDataLayout()), Chain, in LowerLOAD()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 3653 SDValue LoadRes = DAG.getExtLoad( in ReplaceNodeResults()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 4468 SDValue LoadVal = DAG.getExtLoad( in passByValArg()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5171 V = DAG.getExtLoad(ISD::EXTLOAD, DL, XLenVT, Ld->getChain(), NewAddr, in lowerVECTOR_SHUFFLE() 9443 DAG.getExtLoad(ISD::EXTLOAD, DL, XLenVT, Load->getChain(), Ptr, in LowerINTRINSIC_W_CHAIN() 12329 SDValue Res = DAG.getExtLoad(ISD::SEXTLOAD, dl, MVT::i64, Ld->getChain(), in ReplaceNodeResults() 19441 Val = DAG.getExtLoad( in unpackFromMemLoc()
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/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.cpp | 9542 return DAG.getExtLoad(LD->getExtensionType(), SDLoc(LD), ExtendedTy, in SkipLoadExtensionForVMULL() 10150 SDValue Load = DAG.getExtLoad( in LowerPredicateLoad() 15238 DAG.getExtLoad(ISD::ZEXTLOAD, SDLoc(N), VT, LN0->getChain(), in PerformVMOVrhCombine() 18871 SDValue Load = DAG.getExtLoad( in PerformMVEExtCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelDAGToDAG.cpp | 1394 SDValue Result = CurDAG->getExtLoad(ISD::EXTLOAD, dl, DstVT, Store, in PreprocessISelDAG()
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H A D | X86ISelLowering.cpp | 18955 IDX = DAG.getExtLoad(ISD::ZEXTLOAD, dl, PtrVT, Chain, IDX, in LowerGlobalTLSAddress() 19959 SDValue Fudge = DAG.getExtLoad( in LowerUINT_TO_FP() 51308 return DAG.getExtLoad(Ext, dl, RegVT, Ld->getChain(), Cast, in combineLoad() 57403 SDValue Load = DAG.getExtLoad( in combineEXTEND_VECTOR_INREG()
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/freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/ |
H A D | LoongArchISelLowering.cpp | 4981 return DAG.getExtLoad( in unpackFromMemLoc()
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/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 2929 SDValue newLD = DAG.getExtLoad(ISD::ZEXTLOAD, dl, MVT::i16, LD->getChain(), in LowerLOADi1()
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 2546 C.Op0 = DAG.getExtLoad(ExtType, SDLoc(Load), MVT::i32, Load->getChain(), in adjustSubwordCmp()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 7492 ArgValue = DAG.getExtLoad(ExtType, DL, VA.getLocVT(), Chain, FIN, PtrInfo, in LowerFormalArguments() 24988 SDValue ExtLoad = DAG.getExtLoad(ISD::EXTLOAD, SDLoc(N), VT, in performFPExtendCombine()
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