| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | SMEPeepholeOpt.cpp | 125 return TRI.getCommonSubClass(&AArch64::ZPRRegClass, RC) || in isSVERegOp()
126 TRI.getCommonSubClass(&AArch64::PPRRegClass, RC); in isSVERegOp()
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| H A D | AArch64InstrInfo.cpp | 771 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
778 if (!RI.getCommonSubClass(RC, MRI.getRegClass(DstReg))) in canInsertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveStacks.cpp | 66 OldRC = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
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| H A D | TargetRegisterInfo.cpp | 324 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass() function in TargetRegisterInfo
448 return TRI.getCommonSubClass(DefRC, SrcRC) != nullptr; in shareSameRegisterFile()
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| H A D | DetectDeadLanes.cpp | 105 return !TRI.getCommonSubClass(SrcRC, DstRC); in isCrossCopy()
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| H A D | MachineRegisterInfo.cpp | 75 MRI.getTargetRegisterInfo()->getCommonSubClass(OldRC, RC); in constrainRegClass()
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| H A D | RegisterCoalescer.cpp | 523 NewRC = TRI.getCommonSubClass(DstRC, SrcRC); in setRegisters()
1424 TRI->getCommonSubClass(DefRC, DstRC); in reMaterializeTrivialDef()
1521 NewRC = TRI->getCommonSubClass(NewRC, DefRC); in reMaterializeTrivialDef()
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| H A D | MachineInstr.cpp | 1052 CurRC = TRI->getCommonSubClass(CurRC, OpRC); in getRegClassConstraintEffect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 149 TRI->getCommonSubClass(getRC32(FalseMO, VRM, MRI), in getRegAllocationHints()
152 RC = TRI->getCommonSubClass(RC, in getRegAllocationHints()
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| H A D | SystemZInstrInfo.cpp | 613 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPURewriteAGPRCopyMFMA.cpp | 196 TRI.getCommonSubClass(Src2ExceptRC, NewSrc2ConstraintRC); in run()
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| H A D | SIFoldOperands.cpp | 935 else if (!TRI->getCommonSubClass(RC, OpRC)) in getRegSeqInit()
1074 if (!TRI->getCommonSubClass(OpRC, SplatRC)) in tryFoldRegSeqSplat()
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| H A D | SIInstrInfo.cpp | 6361 SRC = RI.getCommonSubClass(SRC, DstRC); in readlaneVGPRToSGPR()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 878 getCommonSubClass(const TargetRegisterClass *A,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 139 TRI->getCommonSubClass(UseRC, RC); in EmitCopyFromReg()
215 VTRC = TRI->getCommonSubClass(RC, VTRC); in CreateVirtualRegisters()
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| H A D | DAGCombiner.cpp | 20462 if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC)) in canMergeExpensiveCrossRegisterBankCopy()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 128 if (const auto *SubRC = TRI.getCommonSubClass( in constrainOperandRegClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1542 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
1575 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 4173 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/ |
| H A D | DemangleTestCases.inc | 20645 {"_ZN4llvm17getCommonSubClassEPKNS_19TargetRegisterClassES2_", "llvm::getCommonSubClass(llvm::Targe…
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