Searched refs:getCommonSubClass (Results 1 – 17 of 17) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | LiveStacks.cpp | 67 S2RCMap[Slot] = TRI->getCommonSubClass(OldRC, RC); in getOrCreateInterval()
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| H A D | TargetRegisterInfo.cpp | 286 TargetRegisterInfo::getCommonSubClass(const TargetRegisterClass *A, in getCommonSubClass() function in TargetRegisterInfo
407 return TRI.getCommonSubClass(DefRC, SrcRC) != nullptr; in shareSameRegisterFile()
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| H A D | DetectDeadLanes.cpp | 105 return !TRI.getCommonSubClass(SrcRC, DstRC); in isCrossCopy()
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| H A D | MachineRegisterInfo.cpp | 76 MRI.getTargetRegisterInfo()->getCommonSubClass(OldRC, RC); in constrainRegClass()
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| H A D | RegisterCoalescer.cpp | 515 NewRC = TRI.getCommonSubClass(DstRC, SrcRC); in setRegisters()
1390 TRI->getCommonSubClass(DefRC, DstRC); in reMaterializeTrivialDef()
1486 NewRC = TRI->getCommonSubClass(NewRC, DefRC); in reMaterializeTrivialDef()
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| H A D | MachineInstr.cpp | 1025 CurRC = TRI->getCommonSubClass(CurRC, OpRC); in getRegClassConstraintEffect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZRegisterInfo.cpp | 150 TRI->getCommonSubClass(getRC32(FalseMO, VRM, MRI), in getRegAllocationHints()
153 RC = TRI->getCommonSubClass(RC, in getRegAllocationHints()
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| H A D | SystemZInstrInfo.cpp | 565 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | GCNRewritePartialRegUses.cpp | 440 SubRegRC = TRI->getCommonSubClass(SubRegRC, OpDescRC); in rewriteReg()
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| H A D | SIRegisterInfo.cpp | 2946 return getCommonSubClass(DefRC, SrcRC) != nullptr; in shouldRewriteCopySrc()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | TargetRegisterInfo.h | 831 getCommonSubClass(const TargetRegisterClass *A,
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | InstrEmitter.cpp | 140 TRI->getCommonSubClass(UseRC, RC); in EmitCopyFromReg()
216 VTRC = TRI->getCommonSubClass(RC, VTRC); in CreateVirtualRegisters()
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| H A D | DAGCombiner.cpp | 19463 if (!TRI || TRI->getCommonSubClass(ArgRC, ResRC)) in canMergeExpensiveCrossRegisterBankCopy()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 128 if (const auto *SubRC = TRI.getCommonSubClass( in constrainOperandRegClass()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCInstrInfo.cpp | 1544 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
1577 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in insertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 711 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
718 if (!RI.getCommonSubClass(RC, MRI.getRegClass(DstReg))) in canInsertSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrInfo.cpp | 4114 RI.getCommonSubClass(MRI.getRegClass(TrueReg), MRI.getRegClass(FalseReg)); in canInsertSelect()
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