Searched refs:getBaseReg (Results 1 – 5 of 5) sorted by relevance
112 Register getBaseReg() const { return getOperand(2).getReg(); } in getBaseReg() function172 Register getBaseReg() const { return getOperand(2).getReg(); } in getBaseReg() function333 Register getBaseReg() const { return getReg(1); } in getBaseReg() function
783 if (Last.Ptr->getBaseReg() != New.Ptr->getBaseReg() || in optimizeConsecutiveMemOpAddressing()
5549 Register Base = ExtLd.getBaseReg(); in selectIndexedExtLoad()5654 Register Base = Ld.getBaseReg(); in selectIndexedLoad()5702 Register Base = I.getBaseReg(); in selectIndexedStore()
1277 !TLI.isIndexingLegal(LdSt, PtrAdd->getBaseReg(), Offset, in findPostIndexCandidate()1292 for (auto &BasePtrUse : MRI.use_nodbg_instructions(PtrAdd->getBaseReg())) { in findPostIndexCandidate()1324 Base = PtrAdd->getBaseReg(); in findPostIndexCandidate()2582 Register LHS = PtrAdd.getBaseReg(); in matchCombineConstPtrAddToI2P()3707 auto ConstVal = getIConstantVRegVal(PtrAdd.getBaseReg(), MRI); in matchPtrAddZero()3712 const MachineInstr *VecMI = MRI.getVRegDef(PtrAdd.getBaseReg()); in matchPtrAddZero()4802 Register Src1Reg = PtrAdd.getBaseReg(); in reassociationCanBreakAddressingModePattern()4895 if (!mi_match(MI.getBaseReg(), MRI, in matchReassocConstantInnerLHS()4927 Register LHSSrc1 = LHSPtrAdd->getBaseReg(); in matchReassocFoldConstantsInSubTree()4961 MachineInstr *LHS = MRI.getVRegDef(PtrAdd.getBaseReg()); in matchReassocPtrAdd()
477 MCRegister getBaseReg() const { return BaseReg; } in getBaseReg() function in __anonee973c6c0111::X86AsmParser::IntelExprStateMachine2223 if (!(SM.getBaseReg() || SM.getIndexReg() || SM.getImm())) { in RewriteIntelExpression()2233 if (SM.getBaseReg()) in RewriteIntelExpression()2234 BaseRegStr = X86IntelInstPrinter::getRegisterName(SM.getBaseReg()); in RewriteIntelExpression()2676 MCRegister BaseReg = SM.getBaseReg(); in parseIntelOperand()