Searched refs:getBaseReg (Results 1 – 5 of 5) sorted by relevance
109 Register getBaseReg() const { return getOperand(2).getReg(); } in getBaseReg() function169 Register getBaseReg() const { return getOperand(2).getReg(); } in getBaseReg() function330 Register getBaseReg() const { return getReg(1); } in getBaseReg() function
667 if (Last.Ptr->getBaseReg() != New.Ptr->getBaseReg() || in optimizeConsecutiveMemOpAddressing()
5412 Register Base = ExtLd.getBaseReg(); in selectIndexedExtLoad()5499 Register Base = Ld.getBaseReg(); in selectIndexedLoad()5547 Register Base = I.getBaseReg(); in selectIndexedStore()
1209 !TLI.isIndexingLegal(LdSt, PtrAdd->getBaseReg(), Offset, in findPostIndexCandidate()1224 for (auto &BasePtrUse : MRI.use_nodbg_instructions(PtrAdd->getBaseReg())) { in findPostIndexCandidate()1256 Base = PtrAdd->getBaseReg(); in findPostIndexCandidate()2478 Register LHS = PtrAdd.getBaseReg(); in matchCombineConstPtrAddToI2P()3557 auto ConstVal = getIConstantVRegVal(PtrAdd.getBaseReg(), MRI); in matchPtrAddZero()3562 const MachineInstr *VecMI = MRI.getVRegDef(PtrAdd.getBaseReg()); in matchPtrAddZero()4674 Register Src1Reg = PtrAdd.getBaseReg(); in reassociationCanBreakAddressingModePattern()4767 if (!mi_match(MI.getBaseReg(), MRI, in matchReassocConstantInnerLHS()4800 Register LHSSrc1 = LHSPtrAdd->getBaseReg(); in matchReassocFoldConstantsInSubTree()4834 MachineInstr *LHS = MRI.getVRegDef(PtrAdd.getBaseReg()); in matchReassocPtrAdd()
471 unsigned getBaseReg() const { return BaseReg; } in getBaseReg() function in __anonee973c6c0111::X86AsmParser::IntelExprStateMachine2198 if (!(SM.getBaseReg() || SM.getIndexReg() || SM.getImm())) { in RewriteIntelExpression()2208 if (SM.getBaseReg()) in RewriteIntelExpression()2209 BaseRegStr = X86IntelInstPrinter::getRegisterName(SM.getBaseReg()); in RewriteIntelExpression()2654 unsigned BaseReg = SM.getBaseReg(); in parseIntelOperand()