/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
H A D | SelectionDAGNodes.h | 1427 const SDValue &getBasePtr() const { 1515 const SDValue &getBasePtr() const { 2449 const SDValue &getBasePtr() const { return getOperand(1); } 2480 const SDValue &getBasePtr() const { return getOperand(2); } 2515 const SDValue &getBasePtr() const { 2584 const SDValue &getBasePtr() const { return getOperand(1); } 2613 const SDValue &getBasePtr() const { return getOperand(1); } 2650 const SDValue &getBasePtr() const { return getOperand(2); } 2686 const SDValue &getBasePtr() const { return getOperand(2); } 2756 const SDValue &getBasePtr() const { return getOperand(1); } [all …]
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGAddressAnalysis.cpp | 200 SDValue Ptr = N->getBasePtr(); in matchLSNode() 252 Base = DAG.getTargetLoweringInfo().unwrapAddress(LSBase->getBasePtr()); in matchLSNode()
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H A D | LegalizeVectorTypes.cpp | 456 N->getBasePtr(), DAG.getUNDEF(N->getBasePtr().getValueType()), in ScalarizeVecRes_LOAD() 950 N->getBasePtr(), N->getPointerInfo(), in ScalarizeVecOp_STORE() 955 N->getBasePtr(), N->getPointerInfo(), 2037 SDValue Ptr = LD->getBasePtr(); in SplitVecRes_LOAD() 2083 SDValue Ptr = LD->getBasePtr(); in SplitVecRes_VP_LOAD() 2190 SLD->getChain(), SLD->getBasePtr(), SLD->getOffset(), SLD->getStride(), in SplitVecRes_VP_STRIDED_LOAD() 2203 EVT PtrVT = SLD->getBasePtr().getValueType(); in SplitVecRes_VP_STRIDED_LOAD() 2208 DAG.getNode(ISD::ADD, DL, PtrVT, SLD->getBasePtr(), Increment); in SplitVecRes_VP_STRIDED_LOAD() 2244 SDValue Ptr = MLD->getBasePtr(); in SplitVecRes_MLOAD() [all...] |
H A D | LegalizeFloatTypes.cpp | 854 L->getChain(), L->getBasePtr(), L->getOffset(), in SoftenFloatRes_LOAD() 865 dl, L->getChain(), L->getBasePtr(), L->getOffset(), in SoftenFloatRes_LOAD() 884 {L->getChain(), L->getBasePtr()}, L->getMemOperand()); in SoftenFloatRes_ATOMIC_LOAD() 1251 return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(), in SoftenFloatOp_STORE() 1266 ST->getBasePtr(), ST->getMemOperand()); in SoftenFloatOp_ATOMIC_STORE() 1923 SDValue Ptr = LD->getBasePtr(); in ExpandFloatRes_LOAD() 2283 SDValue Ptr = ST->getBasePtr(); in ExpandFloatOp_STORE() 2543 return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(), in PromoteFloatOp_STORE() 2561 ST->getBasePtr(), ST->getMemOperand()); in PromoteFloatOp_ATOMIC_STORE() 2889 L->getChain(), L->getBasePtr(), L->getOffset(), L->getPointerInfo(), IVT, in PromoteFloatRes_LOAD() [all …]
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H A D | DAGCombiner.cpp | 1108 LoadStore && LoadStore->getBasePtr().getNode() == N) { in reassociationCanBreakAddressingModePattern() 1438 LD->getChain(), LD->getBasePtr(), in PromoteOperand() 1674 LD->getChain(), LD->getBasePtr(), in PromoteLoad() 2329 if (LD->isIndexed() || LD->getBasePtr().getNode() != N) in canFoldInAddressingMode() 2334 if (ST->isIndexed() || ST->getBasePtr().getNode() != N) in canFoldInAddressingMode() 2339 if (LD->isIndexed() || LD->getBasePtr().getNode() != N) in canFoldInAddressingMode() 2344 if (ST->isIndexed() || ST->getBasePtr().getNode() != N) in canFoldInAddressingMode() 6496 EVT PtrType = LDST->getBasePtr().getValueType(); in isLegalNarrowLdSt() 6991 ExtVT, DL, MLoad->getChain(), MLoad->getBasePtr(), in visitAND() 7161 Load->getChain(), Load->getBasePtr(), in visitAND() [all …]
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H A D | LegalizeTypesGeneric.cpp | 257 SDValue Ptr = LD->getBasePtr(); in ExpandRes_NormalLoad() 466 SDValue Ptr = St->getBasePtr(); in ExpandOp_NormalStore()
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H A D | StatepointLowering.cpp | 555 LPadPointers.insert(Builder.getValue(Relocate->getBasePtr())); in lowerStatepointMetaArgs() 1069 SI.Bases.push_back(Relocate->getBasePtr()); in LowerStatepoint()
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H A D | LegalizeIntegerTypes.cpp | 371 N->getChain(), N->getBasePtr(), in PromoteIntRes_Atomic0() 403 N->getChain(), N->getBasePtr(), in PromoteIntRes_Atomic1() 426 N->getChain(), N->getBasePtr(), N->getOperand(2), N->getOperand(3), in PromoteIntRes_AtomicCmpSwap() 455 N->getBasePtr(), Op2, Op3, N->getMemOperand()); in PromoteIntRes_AtomicCmpSwap() 949 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_LOAD() 967 SDValue Res = DAG.getMaskedLoad(NVT, dl, N->getChain(), N->getBasePtr(), in PromoteIntRes_MLOAD() 989 SDValue Ops[] = {N->getChain(), ExtPassThru, N->getMask(), N->getBasePtr(), in PromoteIntRes_MGATHER() 2136 N->getChain(), Op1, N->getBasePtr(), N->getMemOperand()); in PromoteIntOp_ATOMIC_STORE() 2354 SDValue Ch = N->getChain(), Ptr = N->getBasePtr(); in PromoteIntOp_STORE() 2381 return DAG.getMaskedStore(N->getChain(), SDLoc(N), DataOp, N->getBasePtr(), in PromoteIntOp_MSTORE() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelDAGToDAG.cpp | 1254 if (!selectBDVAddr12Only(Load->getBasePtr(), ElemV, Base, Disp, Index) || in tryGather() 1288 if (!selectBDVAddr12Only(Store->getBasePtr(), ElemV, Base, Disp, Index) || in tryScatter() 1332 if (LoadNode->getBasePtr() != StoreNode->getBasePtr() || in isFusableLoadOpStorePattern() 1449 if (!selectBDAddr20Only(StoreNode->getBasePtr(), Base, Disp)) in tryFoldLoadStoreIntoMemOperand() 1504 if (SystemZISD::isPCREL(Load->getBasePtr().getOpcode())) in storeLoadCanUseMVC() 1507 if (SystemZISD::isPCREL(Store->getBasePtr().getOpcode())) in storeLoadCanUseMVC() 1528 SDValue BasePtr = MemAccess->getBasePtr(); in storeLoadIsAligned() 1781 AtomOp->getBasePtr(), AtomOp->getMemoryVT(), AtomOp->getMemOperand())); in Select()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/ |
H A D | AVRISelDAGToDAG.cpp | 182 LD->getBasePtr(), LD->getChain()); in selectIndexedLoad() 335 SDValue BasePtr = ST->getBasePtr(); in select() 388 SDValue Ptr = LD->getBasePtr(); in select()
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelDAGToDAG.cpp | 354 LD->getBasePtr(), LD->getChain())); in tryIndexedLoad() 370 SDValue Ops0[] = { N2, LD->getBasePtr(), LD->getChain() }; in tryIndexedBinOp()
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/freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
H A D | VEISelLowering.cpp | 1331 DAG.getLoad(MVT::f64, DL, LdNode->getChain(), LdNode->getBasePtr(), in lowerLoadF128() 1335 EVT AddrVT = LdNode->getBasePtr().getValueType(); in lowerLoadF128() 1336 SDValue HiPtr = DAG.getNode(ISD::ADD, DL, AddrVT, LdNode->getBasePtr(), in lowerLoadF128() 1372 SDValue BasePtr = LdNode->getBasePtr(); in lowerLoadI1() 1435 SDValue BasePtr = LdNode->getBasePtr(); in lowerLOAD() 1472 StNode->getBasePtr(), MachinePointerInfo(), Alignment, in lowerStoreF128() 1475 EVT AddrVT = StNode->getBasePtr().getValueType(); in lowerStoreF128() 1476 SDValue HiPtr = DAG.getNode(ISD::ADD, DL, AddrVT, StNode->getBasePtr(), in lowerStoreF128() 1497 SDValue BasePtr = StNode->getBasePtr(); in lowerStoreI1() 1548 SDValue BasePtr = StNode->getBasePtr(); in lowerSTORE()
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H A D | VECustomDAG.cpp | 232 return MemN->getBasePtr(); in getMemoryPtr()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
H A D | R600ISelLowering.cpp | 1037 SDValue BasePtr = Store->getBasePtr(); in lowerPrivateTruncStore() 1109 SDValue Ptr = StoreNode->getBasePtr(); in LowerSTORE() 1269 SDValue BasePtr = Load->getBasePtr(); in lowerPrivateExtLoad() 1331 SDValue Ptr = LoadNode->getBasePtr(); in LowerLOAD() 1671 SDValue Ptr = LoadNode->getBasePtr(); in constBufferLoad() 1930 SDValue Ptr = LoadNode->getBasePtr(); in PerformDAGCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/ |
H A D | EarlyCSE.cpp | 332 GCR->getBasePtr(), GCR->getDerivedPtr()); in getHashValueImpl() 413 GCR1->getBasePtr() == GCR2->getBasePtr() && in isEqualImpl()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelDAGToDAG.cpp | 78 SDValue Base = LD->getBasePtr(); in INITIALIZE_PASS() 475 SDValue Base = ST->getBasePtr(); in SelectIndexedStore() 1110 SDValue LDBasePtr = cast<MemSDNode>(SYNode)->getBasePtr(); in isMemOPCandidate() 1111 SDValue STBasePtr = cast<MemSDNode>(UUse)->getBasePtr(); in isMemOPCandidate() 2406 SDValue BasePtr = cast<MemSDNode>(N)->getBasePtr(); in rebalanceAddressTrees()
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H A D | HexagonISelLowering.cpp | 3113 LN->getBasePtr(), LN->getOffset(), LN->getPointerInfo(), in LowerLoad() 3120 if (!validateConstPtrAlignment(LN->getBasePtr(), ClaimAlign, dl, DAG)) in LowerLoad() 3149 SDValue NS = DAG.getTruncStore(SN->getChain(), dl, TR, SN->getBasePtr(), in LowerStore() 3152 NS = DAG.getIndexedStore(NS, dl, SN->getBasePtr(), SN->getOffset(), in LowerStore() 3159 if (!validateConstPtrAlignment(SN->getBasePtr(), ClaimAlign, dl, DAG)) in LowerStore() 3216 SDValue Base = LN->getBasePtr(); in LowerUnalignedLoad() 3846 std::pair<SDValue,int> BO = getBaseAndOffset(L->getBasePtr()); in shouldReduceLoadWidth()
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/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 2962 DAG.getLoad(MVT::f64, dl, LdNode->getChain(), LdNode->getBasePtr(), in LowerF128Load() 2964 EVT addrVT = LdNode->getBasePtr().getValueType(); in LowerF128Load() 2966 LdNode->getBasePtr(), in LowerF128Load() 3030 StNode->getBasePtr(), StNode->getPointerInfo(), in LowerF128Store() 3032 EVT addrVT = StNode->getBasePtr().getValueType(); in LowerF128Store() 3034 StNode->getBasePtr(), in LowerF128Store() 3056 St->getChain(), dl, Val, St->getBasePtr(), St->getPointerInfo(), in LowerSTORE() 3655 Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, in ReplaceNodeResults()
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/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 415 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD() 488 SDValue BasePtr = ST->getBasePtr(); in LowerSTORE() 1705 return DAG.getMemmove(Chain, dl, ST->getBasePtr(), LD->getBasePtr(), in PerformDAGCombine()
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/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
H A D | RISCVISelLowering.cpp | 5133 Ld->getBasePtr(), TypeSize::getFixed(Offset), DL); in lowerVECTOR_SHUFFLE() 5580 SDValue L = DAG.getLoad(NewVT, DL, Load->getChain(), Load->getBasePtr(), in expandUnalignedRVVLoad() 5612 return DAG.getStore(Store->getChain(), DL, StoredVal, Store->getBasePtr(), in expandUnalignedRVVStore() 10778 DAG.getLoad(ContainerVT, DL, Load->getChain(), Load->getBasePtr(), in lowerFixedLengthVectorLoadToRVV() 10793 Ops.push_back(Load->getBasePtr()); in lowerFixedLengthVectorLoadToRVV() 10840 return DAG.getStore(Store->getChain(), DL, NewValue, Store->getBasePtr(), in lowerFixedLengthVectorStoreToRVV() 10853 {Store->getChain(), IntID, NewValue, Store->getBasePtr(), VL}, in lowerFixedLengthVectorStoreToRVV() 10866 SDValue BasePtr = MemSD->getBasePtr(); in lowerMaskedLoad() 10930 SDValue BasePtr = MemSD->getBasePtr(); in lowerMaskedStore() 11812 DAG.getUNDEF(ContainerVT), VPNode->getBasePtr(), in lowerVPStridedLoad() [all...] |
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 6193 SDValue BasePtr = MGT->getBasePtr(); in LowerMGATHER() 6292 SDValue BasePtr = MSC->getBasePtr(); in LowerMSCATTER() 6381 VT, DL, LoadNode->getChain(), LoadNode->getBasePtr(), in LowerMLOAD() 6420 ST->getBasePtr(), ST->getMemOperand()); in LowerTruncateVectorStore() 6477 {StoreNode->getChain(), Lo, Hi, StoreNode->getBasePtr()}, in LowerSTORE() 6487 SDValue Base = StoreNode->getBasePtr(); in LowerSTORE() 6530 StoreNode->getBasePtr()}, in LowerStore128() 6543 SDValue Base = LoadNode->getBasePtr(); in LowerLOAD() 6580 LoadNode->getBasePtr(), MachinePointerInfo()); in LowerLOAD() 8127 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr())) in addTokenForArgument() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 3059 Ptr = LD->getBasePtr(); in getPreIndexedAddressParts() 3063 Ptr = ST->getBasePtr(); in getPreIndexedAddressParts() 8036 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD() 8061 SDValue BasePtr = ST->getBasePtr(); in LowerSTORE() 8570 RLI.Ptr = LD->getBasePtr(); in canReuseLoadAddress() 9571 LD->getBasePtr(), // Ptr in LowerBUILD_VECTOR() 10207 SDValue BasePtr = LD->getBasePtr(); in LowerVECTOR_SHUFFLE() 11541 SDValue BasePtr = LN->getBasePtr(); in LowerVectorLoad() 11586 SDValue BasePtr = SN->getBasePtr(); in LowerVectorStore() 11767 SDValue LoadOps[] = {LD->getChain(), LD->getBasePtr()}; in LowerFP_EXTEND() [all …]
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 3106 SDValue BasePtr = cast<LoadSDNode>(Load)->getBasePtr(); in shouldReduceLoadWidth() 4717 return getTargetConstantFromBasePtr(Load->getBasePtr()); in getTargetConstantFromNode() 4903 SDValue Ptr = MemIntr->getBasePtr(); in getTargetConstantBitsFromNode() 4924 SDValue Ptr = MemIntr->getBasePtr(); in getTargetConstantBitsFromNode() 6383 SDValue Ptr = DAG.getMemBasePlusOffset(Mem->getBasePtr(), in getBROADCAST_LOAD() 6781 SDValue Ptr = LD->getBasePtr(); in LowerAsSplatVectorLoad() 7008 DAG.getLoad(VT, DL, LDBase->getChain(), LDBase->getBasePtr(), in EltsFromConsecutiveLoads() 7095 SDValue Ops[] = { LDBase->getChain(), LDBase->getBasePtr() }; in EltsFromConsecutiveLoads() 7482 SDValue Ops[] = {LN->getChain(), LN->getBasePtr()}; in lowerBuildVectorAsBroadcast() 7496 SDValue Ops[] = {LN->getChain(), LN->getBasePtr()}; in lowerBuildVectorAsBroadcast() [all …]
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H A D | X86ISelDAGToDAG.cpp | 1032 SDValue Ops[] = {MemNode->getChain(), MemNode->getBasePtr()}; in PreprocessISelDAG() 1064 SDValue Ptr = Ld->getBasePtr(); in PreprocessISelDAG() 1070 UserLd->getBasePtr() == Ptr && UserLd->getChain() == Chain && in PreprocessISelDAG() 3452 if (LoadNode->getBasePtr() != StoreNode->getBasePtr() || in isFusableLoadOpStorePattern() 3605 if (!selectAddr(LoadNode, LoadNode->getBasePtr(), Base, Scale, Index, Disp, in foldLoadStoreIntoMemOperand() 6405 if (!selectVectorAddr(Mgt, Mgt->getBasePtr(), IndexOp, Mgt->getScale(), in Select() 6478 if (!selectVectorAddr(Sc, Sc->getBasePtr(), IndexOp, Sc->getScale(), in Select()
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/freebsd/contrib/llvm-project/llvm/lib/IR/ |
H A D | IntrinsicInst.cpp | 913 Value *GCRelocateInst::getBasePtr() const { in getBasePtr() function in GCRelocateInst
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