/freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
H A D | ipq8074.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-ipq8074.h> 130 clocks = <&gcc GCC_USB1_AUX_CLK>, 132 <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, 133 <&gcc GCC_USB1_PIPE_CLK>; 142 resets = <&gcc GCC_USB1_PHY_BCR>, 143 <&gcc GCC_USB3PHY_1_PHY_BCR>; 155 clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, 159 resets = <&gcc GCC_QUSB2_1_PHY_BCR>; 167 clocks = <&gcc GCC_USB0_AUX_CLK>, 169 <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, [all …]
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H A D | ipq6018.dtsi | 9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h> 10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h> 241 clocks = <&gcc GCC_USB1_PHY_CFG_AHB_CLK>, 245 resets = <&gcc GCC_QUSB2_1_PHY_BCR>; 253 clocks = <&gcc GCC_USB0_AUX_CLK>, 255 <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, 256 <&gcc GCC_USB0_PIPE_CLK>; 265 resets = <&gcc GCC_USB0_PHY_BCR>, 266 <&gcc GCC_USB3PHY_0_PHY_BCR>; 278 clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>, [all …]
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H A D | ipq9574.dtsi | 10 #include <dt-bindings/clock/qcom,ipq9574-gcc.h> 13 #include <dt-bindings/reset/qcom,ipq9574-gcc.h> 232 clocks = <&gcc GCC_PRNG_AHB_CLK>; 241 clocks = <&gcc GCC_MDIO_AHB_CLK>; 270 clocks = <&gcc GCC_CRYPTO_AHB_CLK>, 271 <&gcc GCC_CRYPTO_AXI_CLK>, 272 <&gcc GCC_CRYPTO_CLK>; 306 gcc: clock-controller@1800000 { label 307 compatible = "qcom,ipq9574-gcc"; 344 clocks = <&gcc GCC_SDCC1_AHB_CLK>, [all …]
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H A D | sc8180x.dtsi | 8 #include <dt-bindings/clock/qcom,gcc-sc8180x.h> 782 gcc: clock-controller@100000 { label 783 compatible = "qcom,gcc-sc8180x"; 800 clocks = <&gcc GCC_QUPV3_WRAP_0_M_AHB_CLK>, 801 <&gcc GCC_QUPV3_WRAP_0_S_AHB_CLK>; 812 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 827 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 841 clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; 853 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; 868 clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; [all …]
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H A D | sc8280xp.dtsi | 8 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h> 799 clocks = <&gcc GCC_EMAC0_AXI_CLK>, 800 <&gcc GCC_EMAC0_SLV_AHB_CLK>, 801 <&gcc GCC_EMAC0_PTP_CLK>, 802 <&gcc GCC_EMAC0_RGMII_CLK>; 813 power-domains = <&gcc EMAC_0_GDSC>; 823 gcc: clock-controller@100000 { label 824 compatible = "qcom,gcc-sc8280xp"; 889 clocks = <&gcc GCC_QUPV3_WRAP_2_M_AHB_CLK>, 890 <&gcc GCC_QUPV3_WRAP_2_S_AHB_CLK>; [all …]
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H A D | qcs404.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-qcs404.h> 316 clocks = <&gcc GCC_CDSP_CFG_AHB_CLK>; 334 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, 335 <&gcc GCC_USB3_PHY_PIPE_CLK>; 337 resets = <&gcc GCC_USB3_PHY_BCR>, 338 <&gcc GCC_USB3PHY_PHY_BCR>; 348 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, 349 <&gcc GCC_USB2A_PHY_SLEEP_CLK>; 351 resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, 352 <&gcc GCC_USB2A_PHY_BCR>; [all …]
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H A D | msm8976.dtsi | 9 #include <dt-bindings/clock/qcom,gcc-msm8976.h> 209 clocks = <&gcc GCC_CRYPTO_CLK>, 210 <&gcc GCC_CRYPTO_AXI_CLK>, 211 <&gcc GCC_CRYPTO_AHB_CLK>; 475 clocks = <&gcc GCC_PRNG_AHB_CLK>; 489 <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, 490 <&gcc GCC_USB2A_PHY_SLEEP_CLK>; 492 resets = <&gcc RST_QUSB2_PHY_BCR>, 493 <&gcc RST_USB2_HS_PHY_ONLY_BCR>; 815 gcc: clock-controller@1800000 { label [all …]
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H A D | msm8953.dtsi | 4 #include <dt-bindings/clock/qcom,gcc-msm8953.h> 169 clocks = <&gcc GCC_CRYPTO_CLK>, 170 <&gcc GCC_CRYPTO_AXI_CLK>, 171 <&gcc GCC_CRYPTO_AHB_CLK>; 455 clocks = <&gcc GCC_USB_PHY_CFG_AHB_CLK>, 456 <&gcc GCC_QUSB_REF_CLK>; 461 resets = <&gcc GCC_QUSB2_PHY_BCR>; 469 clocks = <&gcc GCC_PRNG_AHB_CLK>; 802 gcc: clock-controller@1800000 { label 803 compatible = "qcom,gcc-msm8953"; [all …]
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H A D | ipq5332.dtsi | 9 #include <dt-bindings/clock/qcom,ipq5332-gcc.h> 161 clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>; 163 resets = <&gcc GCC_QUSB2_0_PHY_BCR>; 185 clocks = <&gcc GCC_PRNG_AHB_CLK>; 207 gcc: clock-controller@1800000 { label 208 compatible = "qcom,ipq5332-gcc"; 239 clocks = <&gcc GCC_SDCC1_AHB_CLK>, 240 <&gcc GCC_SDCC1_APPS_CLK>, 250 clocks = <&gcc GCC_BLSP1_AHB_CLK>; 260 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, [all …]
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H A D | msm8916.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-msm8916.h> 12 #include <dt-bindings/reset/qcom,gcc-msm8916.h> 257 clocks = <&gcc GCC_CRYPTO_CLK>, 258 <&gcc GCC_CRYPTO_AXI_CLK>, 259 <&gcc GCC_CRYPTO_AHB_CLK>; 447 clocks = <&gcc GCC_PRNG_AHB_CLK>; 1492 gcc: clock-controller@1800000 { label 1493 compatible = "qcom,gcc-msm8916"; 1532 power-domains = <&gcc MDSS_GDSC>; 1534 clocks = <&gcc GCC_MDSS_AHB_CLK>, [all …]
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H A D | msm8939.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-msm8939.h> 12 #include <dt-bindings/reset/qcom,gcc-msm8939.h> 225 clocks = <&gcc GCC_CRYPTO_CLK>, 226 <&gcc GCC_CRYPTO_AXI_CLK>, 227 <&gcc GCC_CRYPTO_AHB_CLK>; 480 clocks = <&gcc GCC_PRNG_AHB_CLK>; 1170 gcc: clock-controller@1800000 { label 1171 compatible = "qcom,gcc-msm8939"; 1212 clocks = <&gcc GCC_MDSS_AHB_CLK>, 1213 <&gcc GCC_MDSS_AXI_CLK>, [all …]
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H A D | ipq5018.dtsi | 10 #include <dt-bindings/clock/qcom,gcc-ipq5018.h> 11 #include <dt-bindings/reset/qcom,gcc-ipq5018.h> 141 clocks = <&gcc GCC_USB0_PHY_CFG_AHB_CLK>; 143 resets = <&gcc GCC_QUSB2_0_PHY_BCR>; 168 gcc: clock-controller@1800000 { label 169 compatible = "qcom,gcc-ipq5018"; 199 clocks = <&gcc GCC_SDCC1_AHB_CLK>, 200 <&gcc GCC_SDCC1_APPS_CLK>, 211 clocks = <&gcc GCC_BLSP1_AHB_CLK>; 221 clocks = <&gcc GCC_BLSP1_UART1_APPS_CLK>, [all …]
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/freebsd/sys/contrib/device-tree/src/arm/qcom/ |
H A D | qcom-ipq4019.dtsi | 8 #include <dt-bindings/clock/qcom,gcc-ipq4019.h> 54 clocks = <&gcc GCC_APPS_CLK_SRC>; 68 clocks = <&gcc GCC_APPS_CLK_SRC>; 82 clocks = <&gcc GCC_APPS_CLK_SRC>; 96 clocks = <&gcc GCC_APPS_CLK_SRC>; 187 gcc: clock-controller@1800000 { label 188 compatible = "qcom,gcc-ipq4019"; 199 clocks = <&gcc GCC_PRNG_AHB_CLK>; 232 clocks = <&gcc GCC_SDCC1_AHB_CLK>, 233 <&gcc GCC_SDCC1_APPS_CLK>, [all …]
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H A D | qcom-ipq8064.dtsi | 7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h> 10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h> 360 clocks = <&gcc RPM_MSG_RAM_H_CLK>; 499 gcc: clock-controller@900000 { label 500 compatible = "qcom,gcc-ipq8064", "syscon"; 556 compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc", "syscon"; 558 clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 566 clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 580 clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 601 clocks = <&gcc USB30_0_MASTER_CLK>; [all …]
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H A D | qcom-msm8660.dtsi | 6 #include <dt-bindings/clock/qcom,gcc-msm8660.h> 22 enable-method = "qcom,gcc-msm8660"; 30 enable-method = "qcom,gcc-msm8660"; 113 gcc: clock-controller@900000 { label 114 compatible = "qcom,gcc-msm8660"; 126 clocks = <&gcc GSBI1_H_CLK>; 140 clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; 152 clocks = <&gcc GSBI3_H_CLK>; 165 clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>; 177 clocks = <&gcc GSBI6_H_CLK>; [all …]
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H A D | qcom-mdm9615.dtsi | 12 #include <dt-bindings/clock/qcom,gcc-mdm9615.h> 14 #include <dt-bindings/reset/qcom,gcc-mdm9615.h> 102 gcc: clock-controller@900000 { label 103 compatible = "qcom,gcc-mdm9615"; 117 <&gcc PLL4_VOTE>, 133 compatible = "qcom,kpss-gcc-mdm9615", "qcom,kpss-gcc", "syscon"; 140 clocks = <&gcc PRNG_CLK>; 142 assigned-clocks = <&gcc PRNG_CLK>; 150 clocks = <&gcc GSBI2_H_CLK>; 164 clocks = <&gcc GSBI2_QUP_CLK>, <&gcc GSBI2_H_CLK>; [all …]
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H A D | qcom-msm8960.dtsi | 5 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 6 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 129 gcc: clock-controller@900000 { label 130 compatible = "qcom,gcc-msm8960"; 146 <&gcc PLL4_VOTE>, 168 <&gcc PLL3>, 169 <&gcc PLL8_VOTE>, 186 compatible = "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc", "syscon"; 188 clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 207 clocks = <&gcc PLL8_VOTE>, <&pxo_board>; [all …]
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H A D | qcom-sdx55.dtsi | 9 #include <dt-bindings/clock/qcom,gcc-sdx55.h> 196 gcc: clock-controller@100000 { label 197 compatible = "qcom,gcc-sdx55"; 210 clocks = <&gcc 30>, 211 <&gcc 9>; 226 resets = <&gcc GCC_QUSB2PHY_BCR>; 233 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>, 234 <&gcc GCC_USB3_PRIM_CLKREF_CLK>, 235 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, 236 <&gcc GCC_USB3_PHY_PIPE_CLK>; [all …]
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H A D | qcom-apq8064.dtsi | 4 #include <dt-bindings/clock/qcom,gcc-msm8960.h> 6 #include <dt-bindings/reset/qcom,gcc-msm8960.h> 335 clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 344 clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 353 clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 362 clocks = <&gcc PLL8_VOTE>, <&pxo_board>; 418 clocks = <&gcc GSBI1_H_CLK>; 431 clocks = <&gcc GSBI1_UART_CLK>, <&gcc GSBI1_H_CLK>; 443 clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>; 457 clocks = <&gcc GSBI2_H_CLK>; [all …]
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H A D | qcom-sdx65.dtsi | 9 #include <dt-bindings/clock/qcom,gcc-sdx65.h> 204 gcc: clock-controller@100000 { label 205 compatible = "qcom,gcc-sdx65"; 226 clocks = <&gcc GCC_BLSP1_UART3_APPS_CLK>, <&gcc GCC_BLSP1_AHB_CLK>; 238 resets = <&gcc GCC_QUSB2PHY_BCR>; 246 clocks = <&gcc GCC_USB3_PHY_AUX_CLK>, 247 <&gcc GCC_USB3_PRIM_CLKREF_EN>, 248 <&gcc GCC_USB_PHY_CFG_AHB2PHY_CLK>, 249 <&gcc GCC_USB3_PHY_PIPE_CLK>; 258 resets = <&gcc GCC_USB3_PHY_BCR>, [all …]
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H A D | qcom-msm8974pro.dtsi | 4 &gcc { 5 compatible = "qcom,gcc-msm8974pro"; 13 clocks = <&gcc GCC_SDCC1_AHB_CLK>, 14 <&gcc GCC_SDCC1_APPS_CLK>, 16 <&gcc GCC_SDCC1_CDCCAL_FF_CLK>, 17 <&gcc GCC_SDCC1_CDCCAL_SLEEP_CLK>;
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/freebsd/sys/contrib/device-tree/Bindings/arm/msm/ |
H A D | qcom,kpss-gcc.txt | 9 "qcom,kpss-gcc" should also be included. 10 "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc" 11 "qcom,kpss-gcc-apq8064", "qcom,kpss-gcc" 12 "qcom,kpss-gcc-msm8974", "qcom,kpss-gcc" 13 "qcom,kpss-gcc-msm8960", "qcom,kpss-gcc" 39 compatible = "qcom,kpss-gcc-ipq8064", "qcom,kpss-gcc"; 41 clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;
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/freebsd/sys/contrib/device-tree/Bindings/net/ |
H A D | qcom-emac.txt | 41 clocks = <&gcc 0>, <&gcc 1>, <&gcc 3>, <&gcc 4>, <&gcc 5>, 42 <&gcc 6>, <&gcc 7>; 90 clocks = <&gcc 0>, <&gcc 1>, <&gcc 3>, <&gcc 4>, <&gcc 5>, 91 <&gcc 6>, <&gcc 7>;
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/freebsd/sys/contrib/device-tree/Bindings/media/ |
H A D | qcom,camss.txt | 183 power-domains = <&gcc VFE_GDSC>; 184 clocks = <&gcc GCC_CAMSS_TOP_AHB_CLK>, 185 <&gcc GCC_CAMSS_ISPIF_AHB_CLK>, 186 <&gcc GCC_CAMSS_CSI0PHYTIMER_CLK>, 187 <&gcc GCC_CAMSS_CSI1PHYTIMER_CLK>, 188 <&gcc GCC_CAMSS_CSI0_AHB_CLK>, 189 <&gcc GCC_CAMSS_CSI0_CLK>, 190 <&gcc GCC_CAMSS_CSI0PHY_CLK>, 191 <&gcc GCC_CAMSS_CSI0PIX_CLK>, 192 <&gcc GCC_CAMSS_CSI0RDI_CLK>, [all …]
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/freebsd/sys/contrib/zstd/ |
H A D | Makefile | 200 gcc-5 -v 201 CC=gcc-5 $(MAKE) all MOREFLAGS="-Werror" 204 gcc-6 -v 205 CC=gcc-6 $(MAKE) all MOREFLAGS="-Werror" 208 gcc-7 -v 209 CC=gcc-7 $(MAKE) all MOREFLAGS="-Werror" 216 gcc -v 220 CC=arm-linux-gnueabi-gcc CFLAGS="-Werror" $(MAKE) allzstd 223 CC=aarch64-linux-gnu-gcc CFLAGS="-Werror -O0" $(MAKE) allzstd 226 CC=powerpc-linux-gnu-gcc CFLAGS="-m32 -Wno-attributes -Werror" $(MAKE) -j allzstd [all …]
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