| /freebsd/sys/modules/syscons/plasma/ |
| H A D | Makefile | 4 SRCS= fp16.c plasma_saver.c
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| /freebsd/contrib/llvm-project/llvm/include/llvm/TargetParser/ |
| H A D | ARMTargetParser.def | 28 ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FPUVersion::VFPV3_FP16,
32 ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FPUVersion::VFPV3_FP16,
36 ARM_FPU("vfpv3xd-fp16", FK_VFPV3XD_FP16, FPUVersion::VFPV3_FP16,
57 ARM_FPU("neon-fp16", FK_NEON_FP16, FPUVersion::VFPV3_FP16,
230 ARM_ARCH_EXT_NAME("fp16", ARM::AEK_FP16, "+fullfp16", "-fullfp16")
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| H A D | X86TargetParser.def | 250 X86_FEATURE_COMPAT(AMX_FP16, "amx-fp16", 0)
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| /freebsd/lib/clang/headers/ |
| H A D | Makefile | 250 .for hdr in bf16/bf16 cde/cde-header fp16/fp16 mve/mve-header neon/neon \
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64FMV.td | 56 def : FMVExtension<"fp16", "FEAT_FP16", "+fullfp16,+fp-armv8,+neon", 170>;
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| H A D | AArch64Features.td | 141 let ArchExtKindSpelling = "AEK_FP16", UserVisibleName = "fp16" in
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| H A D | AArch64InstrInfo.td | 6190 // fp16: integer extraction from vector must be at least 32-bits to be legal.
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | BuiltinsWebAssembly.def | 199 // Half-Precision (fp16)
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| H A D | arm_neon.td | 703 // fp16 vector operations
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| H A D | BuiltinsX86.def | 1727 // AVX512 fp16 intrinsics
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| /freebsd/contrib/elftoolchain/readelf/ |
| H A D | readelf.c | 262 static const char *aeabi_fp_16bit_format(uint64_t fp16);
1782 aeabi_fp_16bit_format(uint64_t fp16) in aeabi_fp_16bit_format() argument
1786 switch (fp16) { in aeabi_fp_16bit_format()
1792 (uintmax_t) fp16); in aeabi_fp_16bit_format()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86.td | 267 def FeatureAMXFP16 : SubtargetFeature<"amx-fp16", "HasAMXFP16", "true",
268 "Support AMX amx-fp16 instructions",
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMFeatures.td | 104 def FeatureFP16 : SubtargetFeature<"fp16", "HasFP16", "true",
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| H A D | ARMInstrMVE.td | 6557 // unsigned integers, fp16 or just raw 16-bit blobs and it makes no
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsAMDGPU.td | 1921 // gfx11+ fp16 interpolation intrinsic, with round-toward-zero rounding mode.
1930 // gfx11+ fp16 interpolation intrinsic, with round-toward-zero rounding mode.
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| H A D | IntrinsicsNVVM.td | 32 // * llvm.nvvm.h2f --> llvm.convert.to.fp16.f32
70 // wmma fp16 -> fp16/fp32 @ m16n16k16/m8n32k16/m32n8k16
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| /freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/ |
| H A D | NVPTXInstrInfo.td | 370 // zero) variants for fp32/fp16 functions.
1168 // ptxas does not have hex representation for fp16, so we can't use
1169 // fp16 immediate values in .f16 instructions. Instead we have to load
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| H A D | NVPTXIntrinsics.td | 6484 // fp16 -> fp16/fp32 @ m16n16k16
6492 // fp16 -> fp16/fp32 @ m8n32k16/m32n8k16
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIInstructions.td | 2771 // Eliminate a zero extension from an fp16 operation if it already
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsMSAInstrInfo.td | 3764 // Pseudoes used to implement transparent fp16 support.
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| /freebsd/contrib/llvm-project/clang/include/clang/Driver/ |
| H A D | Options.td | 6166 def mamx_fp16 : Flag<["-"], "mamx-fp16">, Group<m_x86_Features_Group>;
6167 def mno_amx_fp16 : Flag<["-"], "mno-amx-fp16">, Group<m_x86_Features_Group>;
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