| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | MachineCombiner.cpp | 232 InstrPtr->findRegisterUseOperandIdx(MO.getReg(), /*TRI=*/nullptr); in getDepth()
247 InstrPtr->findRegisterUseOperandIdx(MO.getReg(), in getDepth()
289 UseMO->findRegisterUseOperandIdx(MO.getReg(), /*TRI=*/nullptr)); in getLatency()
|
| H A D | CodeGenCommonISel.cpp | 272 DbgMI->findRegisterUseOperandIdx(DefMO->getReg(), /*TRI=*/nullptr); in salvageDebugInfoForDbgValue()
|
| H A D | MachineLateInstrsCleanup.cpp | 254 } else if (MI.findRegisterUseOperandIdx(Reg, TRI, true /*isKill*/) != -1) in processBlock()
|
| H A D | StackSlotColoring.cpp | 508 if (NextMI->findRegisterUseOperandIdx(LoadReg, /*TRI=*/nullptr, true) != in RemoveDeadStores()
|
| H A D | FixupStatepointCallerSaved.cpp | 120 int Idx = RI->findRegisterUseOperandIdx(Reg, &TRI, false); in performCopyPropagation()
|
| H A D | PeepholeOptimizer.cpp | 1567 unsigned Idx = MI.findRegisterUseOperandIdx(Reg, /*TRI=*/nullptr); in findTargetRecurrence()
|
| H A D | TwoAddressInstructionPass.cpp | 1434 NewMIs[1]->findRegisterUseOperandIdx(regB, /*TRI=*/nullptr); in tryInstructionTransform()
|
| H A D | MachineInstr.cpp | 1081 int MachineInstr::findRegisterUseOperandIdx(Register Reg, in findRegisterUseOperandIdx() function in MachineInstr
|
| H A D | RegisterCoalescer.cpp | 739 ValSEndInst->findRegisterUseOperandIdx(IntB.reg(), /*TRI=*/nullptr, true); in adjustCopiesBackFrom()
|
| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1486 return findRegisterUseOperandIdx(Reg, TRI, false) != -1;
1507 return findRegisterUseOperandIdx(Reg, TRI, true) != -1;
1539 LLVM_ABI int findRegisterUseOperandIdx(Register Reg,
1548 int Idx = findRegisterUseOperandIdx(Reg, TRI, isKill);
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | MVETPAndVPTOptimisationsPass.cpp | 674 if (Iter->findRegisterUseOperandIdx(Reg, /*TRI=*/nullptr) != -1) { in MoveVPNOTBeforeFirstUser()
679 if (Iter->findRegisterUseOperandIdx(VPNOTResult, /*TRI=*/nullptr) == -1) in MoveVPNOTBeforeFirstUser()
733 Iter->findRegisterUseOperandIdx(VCCRValue, /*TRI=*/nullptr) != -1) { in ReduceOldVCCRValueUses()
|
| H A D | ARMLowOverheadLoops.cpp | 96 return MI.findRegisterUseOperandIdx(ARM::VPR, /*TRI=*/nullptr) != -1; in hasVPRUse()
|
| H A D | ARMBaseInstrInfo.cpp | 4008 Idx = II->findRegisterUseOperandIdx(Reg, TRI, false); in getBundledUseMI()
5212 UseOp = MI.findRegisterUseOperandIdx(Reg, TRI, false); in getPartialRegUpdateClearance()
5946 int SPIdx = MI->findRegisterUseOperandIdx(ARM::SP, /*TRI=*/nullptr); in checkAndUpdateStackOffset()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | SIPreEmitPeephole.cpp | 240 MI.removeOperand(MI.findRegisterUseOperandIdx(CondReg, TRI, false /*Kill*/)); in optimizeVccBranch()
|
| H A D | SIOptimizeExecMaskingPreRA.cpp | 480 int Idx = SingleExecUser->findRegisterUseOperandIdx(SavedExec, in run()
|
| H A D | SIWholeQuadMode.cpp | 1508 int Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC, /*TRI=*/nullptr); in lowerCopyInstrs()
1511 Index = MI->findRegisterUseOperandIdx(AMDGPU::EXEC, /*TRI=*/nullptr); in lowerCopyInstrs()
|
| H A D | R600InstrInfo.cpp | 206 return MI.findRegisterUseOperandIdx(R600::AR_X, &RI, false) != -1; in usesAddressRegister()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/ |
| H A D | PPCPreEmitPeephole.cpp | 157 int KillIdx = AfterBBI->findRegisterUseOperandIdx(Reg, TRI, true); in removeRedundantLIs()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/ |
| H A D | SystemZElimCompare.cpp | 640 int CCUse = MBBI->findRegisterUseOperandIdx(SystemZ::CC, TRI, false); in fuseCompareOperations()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstrInfo.cpp | 741 ZeroOperandPosition = I->findRegisterUseOperandIdx(Mips::ZERO, TRI, false); in genInstrWithNewOpc()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86FrameLowering.cpp | 4472 if (MI.findRegisterUseOperandIdx(FP, TRI, false) != -1 || in isFPBPAccess()
4477 if (MI.findRegisterUseOperandIdx(BP, TRI, false) != -1 || in isFPBPAccess()
4617 if (FP && MI->findRegisterUseOperandIdx(FP, TRI, false) != -1) in spillFPBP()
4621 if (BP && MI->findRegisterUseOperandIdx(BP, TRI, false) != -1) in spillFPBP()
|
| H A D | X86InstrInfo.cpp | 5820 UseMI.findRegisterUseOperandIdx(Reg, /*TRI=*/nullptr)); in foldImmediateImpl()
5842 UseMI.findRegisterUseOperandIdx(Reg, /*TRI=*/nullptr) != 2) in foldImmediateImpl()
5847 UseMI.findRegisterUseOperandIdx(Reg, /*TRI=*/nullptr) != 1) in foldImmediateImpl()
5853 unsigned RegIdx = UseMI.findRegisterUseOperandIdx(Reg, /*TRI=*/nullptr); in foldImmediateImpl()
5883 UseMI.findRegisterUseOperandIdx(Reg, /*TRI=*/nullptr)); in foldImmediateImpl()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64RegisterInfo.cpp | 1181 int OpIdx = Use.findRegisterUseOperandIdx(VirtReg, this); in getRegAllocationHints()
|
| H A D | AArch64InstrInfo.cpp | 1769 int Idx = Instr.findRegisterUseOperandIdx(AArch64::NZCV, /*TRI=*/nullptr); in findCondCodeUseOperandIdxForBranchOrSelect()
1784 int Idx = Instr.findRegisterUseOperandIdx(AArch64::NZCV, /*TRI=*/nullptr); in findCondCodeUseOperandIdxForBranchOrSelect()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonInstrInfo.cpp | 4353 int Idx = UseMI.findRegisterUseOperandIdx(SR, &HRI, false); in getOperandLatency()
|