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Searched refs:enableFlatScratch (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFrameLowering.cpp141 unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_STORE_DWORD_SADDR in buildPrologSpill()
165 unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_LOAD_DWORD_SADDR in buildEpilogRestore()
591 return ST.enableFlatScratch() ? 1 : ST.getWavefrontSize(); in getScratchScaleFactor()
629 if (!ST.enableFlatScratch()) in emitEntryFunctionPrologue()
709 (!allStackObjectsAreDead(FrameInfo) && ST.enableFlatScratch())); in emitEntryFunctionPrologue()
1753 if (ST.enableFlatScratch()) { in allocateScavengingFrameIndexesNearIncomingSP()
H A DAMDGPUSubtarget.cpp1068 if (IsAmdHsaOrMesa && !ST.enableFlatScratch()) in GCNUserSGPRUsageInfo()
1089 (IsAmdHsaOrMesa || ST.enableFlatScratch()) && in GCNUserSGPRUsageInfo()
1090 (HasCalls || HasStackObjects || ST.enableFlatScratch()) && in GCNUserSGPRUsageInfo()
H A DSIRegisterInfo.cpp838 unsigned MovOpc = ST.enableFlatScratch() ? AMDGPU::S_MOV_B32 in materializeFrameBaseRegister()
842 ST.enableFlatScratch() ? &AMDGPU::SReg_32_XEXEC_HIRegClass in materializeFrameBaseRegister()
854 ST.enableFlatScratch() ? &AMDGPU::SReg_32_XM0RegClass in materializeFrameBaseRegister()
862 if (ST.enableFlatScratch() ) { in materializeFrameBaseRegister()
1746 unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_LOAD_DWORD_SADDR in buildVGPRSpillLoadStore()
1751 unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_STORE_DWORD_SADDR in buildVGPRSpillLoadStore()
2183 unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_STORE_DWORD_SADDR in eliminateFrameIndex()
2251 unsigned Opc = ST.enableFlatScratch() ? AMDGPU::SCRATCH_LOAD_DWORD_SADDR in eliminateFrameIndex()
2277 if (ST.enableFlatScratch()) { in eliminateFrameIndex()
H A DGCNSubtarget.h346 return (ForBufferRSrc || !enableFlatScratch()) ? MaxPrivateElementSize : 16;
653 bool enableFlatScratch() const { in enableFlatScratch() function
H A DAMDGPUCallLowering.cpp213 if (ST.enableFlatScratch()) { in getStackAddress()
719 if (!Subtarget.enableFlatScratch()) in lowerFormalArguments()
1160 if (!ST.enableFlatScratch()) { in handleImplicitCallArguments()
H A DSIMachineFunctionInfo.cpp89 if (!ST.enableFlatScratch()) { in SIMachineFunctionInfo()
H A DAMDGPU.td2259 def EnableFlatScratch : Predicate<"Subtarget->enableFlatScratch()">;
2261 def DisableFlatScratch : Predicate<"!Subtarget->enableFlatScratch()">;
H A DSIISelLowering.cpp1642 return Subtarget->enableFlatScratch() in isLegalAddressingMode()
1822 Subtarget->enableFlatScratch() || in allowsMisalignedMemoryAccessesImpl()
2685 if (!ST.enableFlatScratch()) { in reservePrivateMemoryRegs()
2830 if (!Subtarget->enableFlatScratch()) in LowerFormalArguments()
2897 if (!Subtarget->enableFlatScratch()) in LowerFormalArguments()
3737 if (!Subtarget->enableFlatScratch()) { in LowerCall()
10938 (NumElements == 3 && !Subtarget->enableFlatScratch())) in LowerSTORE()
H A DAMDGPULegalizerInfo.cpp381 return ST.enableFlatScratch() ? 128 : 32; in maxSizeForAddrSpace()