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Searched refs:efx_qword_t (Results 1 – 22 of 22) sorted by relevance

/freebsd/sys/dev/sfxge/common/
H A Defx_sram.c44 efx_qword_t qword; in efx_sram_buf_tbl_set()
211 __out efx_qword_t *eqp) in efx_sram_byte_increment_set()
218 for (index = 0; index < sizeof (efx_qword_t); index++) in efx_sram_byte_increment_set()
226 __out efx_qword_t *eqp) in efx_sram_all_the_same_set()
240 __out efx_qword_t *eqp) in efx_sram_bit_alternate_set()
253 __out efx_qword_t *eqp) in efx_sram_byte_alternate_set()
266 __out efx_qword_t *eqp) in efx_sram_byte_changing_set()
271 for (index = 0; index < sizeof (efx_qword_t); index++) { in efx_sram_byte_changing_set()
287 __out efx_qword_t *eqp) in efx_sram_bit_sweep_set()
293 EFX_CLEAR_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64); in efx_sram_bit_sweep_set()
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H A Def10_tx.c60 efx_qword_t *dma_addr; in efx_mcdi_init_txq()
109 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_TXQ_IN_DMA_ADDR); in efx_mcdi_init_txq()
343 efx_qword_t *eqp; in ef10_tx_qpio_write()
346 EFSYS_ASSERT(length % sizeof (efx_qword_t) == 0); in ef10_tx_qpio_write()
363 eqp = (efx_qword_t *)buffer; in ef10_tx_qpio_write()
367 write_offset += sizeof (efx_qword_t); in ef10_tx_qpio_write()
387 efx_qword_t pio_desc; in ef10_tx_qpio_post()
404 offset = id * sizeof (efx_qword_t); in ef10_tx_qpio_post()
456 efx_qword_t qword; in ef10_tx_qpost()
463 offset = id * sizeof (efx_qword_t); in ef10_tx_qpost()
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H A Def10_ev.c60 __in efx_qword_t *eqp,
67 __in efx_qword_t *eqp,
74 __in efx_qword_t *eqp,
81 __in efx_qword_t *eqp,
88 __in efx_qword_t *eqp,
152 efx_qword_t *dma_addr; in efx_mcdi_init_evq()
231 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_EVQ_IN_DMA_ADDR); in efx_mcdi_init_evq()
289 efx_qword_t *dma_addr; in efx_mcdi_init_evq_v2()
356 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_EVQ_V2_IN_DMA_ADDR); in efx_mcdi_init_evq_v2()
620 __in efx_qword_t data) in efx_mcdi_driver_event()
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H A Defx_ev.c352 efx_qword_t qword; in efx_ev_qpending()
356 offset = (count & eep->ee_mask) * sizeof (efx_qword_t); in efx_ev_qpending()
373 offset = (count & eep->ee_mask) * sizeof (efx_qword_t); in efx_ev_qprefetch()
388 efx_qword_t ev[EFX_EV_BATCH]; in efx_ev_qpoll()
417 offset = (count & eep->ee_mask) * sizeof (efx_qword_t); in efx_ev_qpoll()
428 offset += sizeof (efx_qword_t); in efx_ev_qpoll()
451 offset *= sizeof (efx_qword_t); in efx_ev_qpoll()
524 offset = (count & eep->ee_mask) * sizeof (efx_qword_t); in efx_ev_qpoll()
527 offset += sizeof (efx_qword_t); in efx_ev_qpoll()
642 __in efx_qword_t *eqp, in siena_ev_rx_not_ok()
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H A Defx_nic.c752 __out efx_qword_t *maskp) in efx_loopback_mask()
754 efx_qword_t mask; in efx_loopback_mask()
860 efx_qword_t mask; in efx_mcdi_get_loopback_modes()
861 efx_qword_t modes; in efx_mcdi_get_loopback_modes()
891 *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_SUGGESTED)); in efx_mcdi_get_loopback_modes()
893 modes = *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_100M); in efx_mcdi_get_loopback_modes()
897 modes = *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_1G); in efx_mcdi_get_loopback_modes()
901 modes = *MCDI_OUT2(req, efx_qword_t, GET_LOOPBACK_MODES_OUT_10G); in efx_mcdi_get_loopback_modes()
909 modes = *MCDI_OUT2(req, efx_qword_t, in efx_mcdi_get_loopback_modes()
919 modes = *MCDI_OUT2(req, efx_qword_t, in efx_mcdi_get_loopback_modes()
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H A Defsys.h366 sizeof (efx_qword_t)), \
386 sizeof (efx_qword_t)), \
478 sizeof (efx_qword_t)), \
499 sizeof (efx_qword_t)), \
623 sizeof (efx_qword_t)), \
675 sizeof (efx_qword_t)), \
769 sizeof (efx_qword_t)), \
784 (_offset), sizeof (efx_qword_t), \
798 sizeof (efx_qword_t)), \
813 (_offset), sizeof (efx_qword_t), \
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H A Dsiena_mac.c265 EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
275 efx_qword_t generation_start; in siena_mac_stats_update()
276 efx_qword_t generation_end; in siena_mac_stats_update()
277 efx_qword_t value; in siena_mac_stats_update()
286 (encp->enc_mac_stats_nstats * sizeof (efx_qword_t))) { in siena_mac_stats_update()
H A Dsiena_sram.c85 efx_qword_t qword; in siena_sram_test()
86 efx_qword_t verify; in siena_sram_test()
H A Def10_rx.c59 efx_qword_t *dma_addr; in efx_mcdi_init_rxq()
136 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR); in efx_mcdi_init_rxq()
813 efx_qword_t qword; in ef10_rx_qpost()
846 offset = id * sizeof (efx_qword_t); in ef10_rx_qpost()
940 efx_qword_t *qwordp; in ef10_rx_qps_packet_info()
948 qwordp = (efx_qword_t *)buffer; in ef10_rx_qps_packet_info()
H A Dmcdi_mon.h55 __in efx_qword_t *eqp,
H A Dmcdi_mon.c159 __in efx_qword_t *eqp, in mcdi_mon_ev()
375 efx_qword_t *limit_info;
401 limit_info = (efx_qword_t *)(maskp + 1);
H A Def10_mac.c600 EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
610 efx_qword_t generation_start; in ef10_mac_stats_update()
611 efx_qword_t generation_end; in ef10_mac_stats_update()
612 efx_qword_t value; in ef10_mac_stats_update()
638 (encp->enc_mac_stats_nstats * sizeof (efx_qword_t))) { in ef10_mac_stats_update()
H A Defx.h962 __out efx_qword_t *maskp);
1329 efx_qword_t enc_loopback_types[EFX_LINK_NMODES];
1913 __out efx_qword_t *eqp);
2002 #define EFX_EVQ_SIZE(_nevs) ((_nevs) * sizeof (efx_qword_t))
2488 #define EFX_RXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
2579 efx_qword_t ed_eq;
2653 #define EFX_TXQ_SIZE(_ndescs) ((_ndescs) * sizeof (efx_qword_t))
H A Dsiena_impl.h333 __in efx_qword_t *eqp,
H A Defx_tx.c749 efx_qword_t qword; \
752 offset = id * sizeof (efx_qword_t); \
H A Def10_phy.c192 __in efx_qword_t *eqp, in ef10_phy_link_ev()
H A Defx_rx.c1460 efx_qword_t qword; in siena_rx_qpost()
1482 offset = id * sizeof (efx_qword_t); in siena_rx_qpost()
H A Dsiena_phy.c115 __in efx_qword_t *eqp, in siena_phy_link_ev()
H A Defx_types.h225 } efx_qword_t; typedef
236 efx_qword_t eo_qword[2];
H A Def10_impl.h623 __in efx_qword_t *eqp,
H A Defx_impl.h769 typedef boolean_t (*efx_ev_handler_t)(efx_evq_t *, efx_qword_t *,
H A Defx_mcdi.c1860 bytes = encp->enc_mac_stats_nstats * sizeof (efx_qword_t); in efx_mcdi_mac_stats()