Searched refs:disablePass (Results 1 – 7 of 7) sorted by relevance
133 disablePass(&MachineCopyPropagationID); in addPostRegAlloc()134 disablePass(&PostRAMachineSinkingID); in addPostRegAlloc()135 disablePass(&PostRASchedulerID); in addPostRegAlloc()136 disablePass(&FuncletLayoutID); in addPostRegAlloc()137 disablePass(&StackMapLivenessID); in addPostRegAlloc()138 disablePass(&PatchableFunctionID); in addPostRegAlloc()139 disablePass(&ShrinkWrapID); in addPostRegAlloc()140 disablePass(&LiveDebugValuesID); in addPostRegAlloc()141 disablePass(&MachineLateInstrsCleanupID); in addPostRegAlloc()144 disablePass(&BranchFolderPassID); in addPostRegAlloc()[all …]
307 disablePass(&PrologEpilogCodeInserterID); in addIRPasses()308 disablePass(&MachineLateInstrsCleanupID); in addIRPasses()309 disablePass(&MachineCopyPropagationID); in addIRPasses()310 disablePass(&TailDuplicateID); in addIRPasses()311 disablePass(&StackMapLivenessID); in addIRPasses()312 disablePass(&LiveDebugValuesID); in addIRPasses()313 disablePass(&PostRAMachineSinkingID); in addIRPasses()314 disablePass(&PostRASchedulerID); in addIRPasses()315 disablePass(&FuncletLayoutID); in addIRPasses()316 disablePass(&PatchableFunctionID); in addIRPasses()[all …]
533 disablePass(&RegisterCoalescerID); in addOptimizedRegAlloc()543 disablePass(&MachineLateInstrsCleanupID); in addPostRegAlloc()544 disablePass(&MachineCopyPropagationID); in addPostRegAlloc()545 disablePass(&PostRAMachineSinkingID); in addPostRegAlloc()546 disablePass(&PostRASchedulerID); in addPostRegAlloc()547 disablePass(&FuncletLayoutID); in addPostRegAlloc()548 disablePass(&StackMapLivenessID); in addPostRegAlloc()549 disablePass(&PatchableFunctionID); in addPostRegAlloc()550 disablePass(&ShrinkWrapID); in addPostRegAlloc()554 disablePass(&MachineBlockPlacementID); in addPostRegAlloc()
24 disablePass<StackMapLivenessPass, FuncletLayoutPass, in AMDGPUCodeGenPassBuilder()
981 disablePass(&StackMapLivenessID); in AMDGPUPassConfig()982 disablePass(&FuncletLayoutID); in AMDGPUPassConfig()984 disablePass(&GCLoweringID); in AMDGPUPassConfig()985 disablePass(&ShadowStackGCLoweringID); in AMDGPUPassConfig()1020 disablePass(&StackMapLivenessID); in addIRPasses()1021 disablePass(&FuncletLayoutID); in addIRPasses()1022 disablePass(&PatchableFunctionID); in addIRPasses()
218 void disablePass(AnalysisID PassID) {196 void disablePass(AnalysisID PassID) { disablePass() function
474 template <typename... PassTs> void disablePass() { in disablePass() function