/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | ath79-ddr-controller.txt | 10 - compatible: has to be "qca,<soc-type>-ddr-controller", 11 "qca,[ar7100|ar7240]-ddr-controller" as fallback. 12 On SoC with PCI support "qca,ar7100-ddr-controller" should be used as 13 fallback, otherwise "qca,ar7240-ddr-controller" should be used. 15 - #qca,ddr-wb-channel-cells: Specifies the number of cells needed to encode 21 compatible = "qca,ar9132-ddr-controller", 22 "qca,ar7240-ddr-controller"; 25 #qca,ddr-wb-channel-cells = <1>; 32 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>; 33 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>,
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H A D | ti-da8xx-ddrctl.txt | 11 - compatible: "ti,da850-ddr-controller" - for da850 SoC based boards 18 compatible = "ti,da850-ddr-controller";
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/freebsd/sys/contrib/device-tree/Bindings/arm/bcm/ |
H A D | brcm,brcmstb.txt | 169 "brcm,brcmstb-ddr-phy-v71.1" 170 "brcm,brcmstb-ddr-phy-v72.0" 171 "brcm,brcmstb-ddr-phy-v225.1" 172 "brcm,brcmstb-ddr-phy-v240.1" 173 "brcm,brcmstb-ddr-phy-v240.2" 182 - compatible : should contain "brcm,brcmstb-ddr-shimphy-v1.0" 190 See Documentation/devicetree/bindings/memory-controllers/brcm,brcmstb-memc-ddr.yaml for a 203 ddr-phy@f1106000 { 204 compatible = "brcm,brcmstb-ddr-phy-v240.1"; 209 compatible = "brcm,brcmstb-ddr-shimphy-v1.0"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/interrupt-controller/ |
H A D | qca,ath79-cpu-intc.txt | 5 qca,ddr-wb-channels and qca,ddr-wb-channel-interrupts properties. 20 - qca,ddr-wb-channel-interrupts: List of the interrupts needing a write 22 - qca,ddr-wb-channels: List of phandles to the write buffer channels for 23 each interrupt. If qca,ddr-wb-channel-interrupts is not present the interrupt 34 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>; 35 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>, 43 #qca,ddr-wb-channel-cells = <1>;
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/freebsd/sys/contrib/device-tree/Bindings/mips/brcm/ |
H A D | soc.txt | 75 memc-ddr@2000 { 79 ddr-phy@6000 { 92 "brcm,brcmstb-ddr-phy-v64.5" 93 "brcm,brcmstb-ddr-phy" 99 ddr-phy@6000 { 100 compatible = "brcm,brcmstb-ddr-phy-v64.5"; 110 "brcm,bcm7425-memc-ddr" 111 "brcm,bcm7429-memc-ddr" 112 "brcm,bcm7435-memc-ddr" and 113 "brcm,brcmstb-memc-ddr" [all …]
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/freebsd/sys/contrib/device-tree/src/arm/broadcom/ |
H A D | bcm7445.dtsi | 239 memc-ddr@2000 { 240 compatible = "brcm,brcmstb-memc-ddr"; 244 ddr-phy@6000 { 245 compatible = "brcm,brcmstb-ddr-phy-v240.1"; 250 compatible = "brcm,brcmstb-ddr-shimphy-v1.0"; 261 memc-ddr@2000 { 262 compatible = "brcm,brcmstb-memc-ddr"; 266 ddr-phy@6000 { 267 compatible = "brcm,brcmstb-ddr-phy-v240.1"; 272 compatible = "brcm,brcmstb-ddr-shimphy-v1.0"; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/perf/ |
H A D | fsl-imx-ddr.txt | 6 "fsl,imx8-ddr-pmu" 7 "fsl,imx8m-ddr-pmu" 8 "fsl,imx8mp-ddr-pmu" 17 ddr-pmu@5c020000 { 18 compatible = "fsl,imx8-ddr-pmu";
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/freebsd/sys/geom/part/ |
H A D | g_part_apm.c | 53 struct apm_ddr ddr; member 270 table->ddr.ddr_sig = APM_DDR_SIG; in g_part_apm_create() 271 table->ddr.ddr_blksize = pp->sectorsize; in g_part_apm_create() 272 table->ddr.ddr_blkcount = last + 1; in g_part_apm_create() 414 table->ddr.ddr_sig = be16dec(buf); in g_part_apm_probe() 415 table->ddr.ddr_blksize = be16dec(buf + 2); in g_part_apm_probe() 416 table->ddr.ddr_blkcount = be32dec(buf + 4); in g_part_apm_probe() 418 if (table->ddr.ddr_blksize != pp->sectorsize) in g_part_apm_probe() 420 if (table->ddr.ddr_blkcount > pp->mediasize / pp->sectorsize) in g_part_apm_probe() 434 table->ddr.ddr_sig = APM_DDR_SIG; /* XXX */ in g_part_apm_probe() [all …]
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/freebsd/usr.bin/mkimg/ |
H A D | apm.c | 63 struct apm_ddr *ddr; in apm_write() local 71 ddr = (void *)buf; in apm_write() 72 be16enc(&ddr->ddr_sig, APM_DDR_SIG); in apm_write() 73 be16enc(&ddr->ddr_blksize, secsz); in apm_write() 74 be32enc(&ddr->ddr_blkcount, imgsz); in apm_write()
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/freebsd/sys/contrib/device-tree/src/mips/qca/ |
H A D | ar9132.dtsi | 28 qca,ddr-wb-channel-interrupts = <2>, <3>, <4>, <5>; 29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>, 52 compatible = "qca,ar9132-ddr-controller", 53 "qca,ar7240-ddr-controller"; 56 #qca,ddr-wb-channel-cells = <1>; 98 clock-output-names = "cpu", "ddr", "ahb";
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H A D | ar9331.dtsi | 28 qca,ddr-wb-channel-interrupts = <2>, <3>; 29 qca,ddr-wb-channels = <&ddr_ctrl 3>, <&ddr_ctrl 2>; 56 compatible = "qca,ar7240-ddr-controller"; 59 #qca,ddr-wb-channel-cells = <1>;
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/freebsd/sys/contrib/device-tree/src/arm64/freescale/ |
H A D | imx8-ss-ddr.dtsi | 13 ddr_pmu0: ddr-pmu@5c020000 { 14 compatible = "fsl,imx8-ddr-pmu";
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/freebsd/sys/contrib/device-tree/Bindings/mmc/ |
H A D | sdhci-msm.txt | 58 - qcom,ddr-config: Certain chipsets and platforms require particular settings 72 1. Data path : sdhc to ddr 75 is "sdhc-ddr" and for config interconnect path it is 99 interconnect-names = "sdhc-ddr","cpu-sdhc"; 102 qcom,ddr-config = <0x80040868>; 122 qcom,ddr-config = <0x80040868>;
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H A D | exynos-dw-mshc.txt | 37 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value 44 Notes for the sdr-timing and ddr-timing values: 90 samsung,dw-mshc-ddr-timing = <1 2>;
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/freebsd/sys/contrib/device-tree/src/mips/brcm/ |
H A D | bcm7425.dtsi | 544 memc-ddr@2000 { 545 compatible = "brcm,brcmstb-memc-ddr"; 549 ddr-phy@6000 { 550 compatible = "brcm,brcmstb-ddr-phy"; 555 compatible = "brcm,brcmstb-ddr-shimphy"; 571 memc-ddr@2000 { 572 compatible = "brcm,brcmstb-memc-ddr"; 576 ddr-phy@6000 { 577 compatible = "brcm,brcmstb-ddr-phy"; 582 compatible = "brcm,brcmstb-ddr-shimphy";
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H A D | bcm7435.dtsi | 560 memc-ddr@2000 { 561 compatible = "brcm,brcmstb-memc-ddr"; 565 ddr-phy@6000 { 566 compatible = "brcm,brcmstb-ddr-phy"; 571 compatible = "brcm,brcmstb-ddr-shimphy"; 587 memc-ddr@2000 { 588 compatible = "brcm,brcmstb-memc-ddr"; 592 ddr-phy@6000 { 593 compatible = "brcm,brcmstb-ddr-phy"; 598 compatible = "brcm,brcmstb-ddr-shimphy";
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H A D | bcm7360.dtsi | 452 memc-ddr@2000 { 453 compatible = "brcm,brcmstb-memc-ddr"; 457 ddr-phy@6000 { 458 compatible = "brcm,brcmstb-ddr-phy"; 463 compatible = "brcm,brcmstb-ddr-shimphy";
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H A D | bcm7362.dtsi | 448 memc-ddr@2000 { 449 compatible = "brcm,brcmstb-memc-ddr"; 453 ddr-phy@6000 { 454 compatible = "brcm,brcmstb-ddr-phy"; 459 compatible = "brcm,brcmstb-ddr-shimphy";
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H A D | bcm7346.dtsi | 533 memc-ddr@2000 { 534 compatible = "brcm,brcmstb-memc-ddr"; 538 ddr-phy@6000 { 539 compatible = "brcm,brcmstb-ddr-phy"; 544 compatible = "brcm,brcmstb-ddr-shimphy";
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/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | exynos5260-xyref5260.dts | 97 mmc-ddr-1_8v; 100 samsung,dw-mshc-ddr-timing = <0 2>; 112 samsung,dw-mshc-ddr-timing = <1 2>;
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H A D | exynos5410-smdk5410.dts | 69 mmc-ddr-1_8v; 72 samsung,dw-mshc-ddr-timing = <1 2>; 82 samsung,dw-mshc-ddr-timing = <1 2>;
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | qca,ath79-pll.txt | 20 - clock-output-names: should be "cpu", "ddr", "ahb" 32 clock-output-names = "cpu", "ddr", "ahb";
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | stm32mp157a-icore-stm32mp1.dtsi | 90 vdd_ddr: regulator-vdd-ddr { 98 vtt_ddr: regulator-vtt-ddr { 107 vref_ddr: regulator-vref-ddr {
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra30-cardhu-a04.dts | 19 ddr_reg: regulator-ddr { 21 regulator-name = "ddr";
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/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | bd9571mwv.txt | 28 - rohm,ddr-backup-power : Value to use for DDR-Backup Power (default 0). 57 rohm,ddr-backup-power = <0xf>;
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