Searched refs:ctrl_reg_val (Results 1 – 2 of 2) sorted by relevance
71 u32 ctrl_reg_val; in ath12k_hal_tx_set_dscp_tid_map() local77 ctrl_reg_val = ath12k_hif_read32(ab, HAL_SEQ_WCSS_UMAC_TCL_REG + in ath12k_hal_tx_set_dscp_tid_map()80 ctrl_reg_val |= HAL_TCL1_RING_CMN_CTRL_DSCP_TID_MAP_PROG_EN; in ath12k_hal_tx_set_dscp_tid_map()82 HAL_TCL1_RING_CMN_CTRL_REG, ctrl_reg_val); in ath12k_hal_tx_set_dscp_tid_map()132 ctrl_reg_val = ath12k_hif_read32(ab, HAL_SEQ_WCSS_UMAC_TCL_REG + in ath12k_hal_tx_set_dscp_tid_map()134 ctrl_reg_val &= ~HAL_TCL1_RING_CMN_CTRL_DSCP_TID_MAP_PROG_EN; in ath12k_hal_tx_set_dscp_tid_map()137 ctrl_reg_val); in ath12k_hal_tx_set_dscp_tid_map()
85 u32 ctrl_reg_val; in ath11k_hal_tx_set_dscp_tid_map() local92 ctrl_reg_val = ath11k_hif_read32(ab, HAL_SEQ_WCSS_UMAC_TCL_REG + in ath11k_hal_tx_set_dscp_tid_map()95 ctrl_reg_val |= HAL_TCL1_RING_CMN_CTRL_DSCP_TID_MAP_PROG_EN; in ath11k_hal_tx_set_dscp_tid_map()97 HAL_TCL1_RING_CMN_CTRL_REG, ctrl_reg_val); in ath11k_hal_tx_set_dscp_tid_map()132 ctrl_reg_val = ath11k_hif_read32(ab, HAL_SEQ_WCSS_UMAC_TCL_REG + in ath11k_hal_tx_set_dscp_tid_map()134 ctrl_reg_val &= ~HAL_TCL1_RING_CMN_CTRL_DSCP_TID_MAP_PROG_EN; in ath11k_hal_tx_set_dscp_tid_map()137 ctrl_reg_val); in ath11k_hal_tx_set_dscp_tid_map()