| /freebsd/contrib/llvm-project/llvm/lib/Target/Xtensa/Disassembler/ |
| H A D | XtensaDisassembler.cpp | 240 MCOperand::createImm(SignExtend64<20>(Imm << 2) + (Address & 0x3))); in decodeCallOperand()
247 Inst.addOperand(MCOperand::createImm(SignExtend64<18>(Imm))); in decodeJumpOperand()
261 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeBranchOperand()
267 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeBranchOperand()
278 Inst.addOperand(MCOperand::createImm(Imm)); in decodeLoopOperand()
286 Inst.addOperand(MCOperand::createImm( in decodeL32ROperand()
294 Inst.addOperand(MCOperand::createImm(SignExtend64<8>(Imm))); in decodeImm8Operand()
302 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Imm << 8))); in decodeImm8_sh8Operand()
309 Inst.addOperand(MCOperand::createImm(SignExtend64<12>(Imm))); in decodeImm12Operand()
316 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUimm4Operand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/Disassembler/ |
| H A D | MipsDisassembler.cpp | 563 MI.addOperand(MCOperand::createImm(tmp)); in DecodeINSVE_DF()
569 MI.addOperand(MCOperand::createImm(0)); in DecodeINSVE_DF()
584 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATIMMR6()
598 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDAHIDATI()
637 MI.addOperand(MCOperand::createImm(Imm)); in DecodeAddiGroupBranch()
671 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP35GroupBranchMMR6()
710 MI.addOperand(MCOperand::createImm(Imm)); in DecodeDaddiGroupBranch()
744 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP37GroupBranchMMR6()
783 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP65GroupBranchMMR6()
822 MI.addOperand(MCOperand::createImm(Imm)); in DecodePOP75GroupBranchMMR6()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/AsmParser/ |
| H A D | PPCAsmParser.cpp | 616 Inst.addOperand(MCOperand::createImm(getImm())); in addImmOperands()
625 Inst.addOperand(MCOperand::createImm(getImm())); in addS16ImmOperands()
628 Inst.addOperand(MCOperand::createImm(getImmS16Context())); in addS16ImmOperands()
640 Inst.addOperand(MCOperand::createImm(getImm())); in addU16ImmOperands()
643 Inst.addOperand(MCOperand::createImm(getImmU16Context())); in addU16ImmOperands()
654 Inst.addOperand(MCOperand::createImm(getImm() / 4)); in addBranchTargetOperands()
805 Inst.addOperand(MCOperand::createImm(-Op.getImm())); in addNegOperand()
836 TmpInst.addOperand(MCOperand::createImm( in processInstruction()
880 TmpInst.addOperand(MCOperand::createImm(L)); in processInstruction()
910 TmpInst.addOperand(MCOperand::createImm(0)); in processInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARC/Disassembler/ |
| H A D | ARCDisassembler.cpp | 175 Inst.addOperand(MCOperand::createImm(SignExtend32<9>(S9))); in DecodeMEMrs9()
193 Inst.addOperand(MCOperand::createImm(Offset)); in DecodeSymbolicOperandOff()
212 Inst.addOperand(MCOperand::createImm( in DecodeSignedOperand()
225 MCOperand::createImm(InsnS < max ? static_cast<int>(InsnS) : -1)); in DecodeFromCyclicRange()
241 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeStLImmInstruction()
242 Inst.addOperand(MCOperand::createImm(0)); in DecodeStLImmInstruction()
259 Inst.addOperand(MCOperand::createImm(LImm)); in DecodeLdLImmInstruction()
260 Inst.addOperand(MCOperand::createImm(0)); in DecodeLdLImmInstruction()
277 Inst.addOperand(MCOperand::createImm((uint32_t)(Insn >> 32))); in DecodeLdRLImmInstruction()
294 Inst.addOperand(MCOperand::createImm(Value)); in DecodeMoveHRegInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/Disassembler/ |
| H A D | AArch64Disassembler.cpp | 275 MI.insert(MI.begin() + i, MCOperand::createImm(0)); in getInstruction()
421 Inst.addOperand(MCOperand::createImm(RegMask)); in DecodeMatrixTileListRegisterClass()
464 Inst.addOperand(MCOperand::createImm(64 - Imm)); in DecodeFixedPointScaleImm32()
471 Inst.addOperand(MCOperand::createImm(64 - Imm)); in DecodeFixedPointScaleImm64()
486 Inst.addOperand(MCOperand::createImm(ImmVal)); in DecodePCRelLabel16()
501 Inst.addOperand(MCOperand::createImm(ImmVal)); in DecodePCRelLabel19()
515 Inst.addOperand(MCOperand::createImm(ImmVal)); in DecodePCRelLabel9()
522 Inst.addOperand(MCOperand::createImm((Imm >> 1) & 1)); in DecodeMemExtend()
523 Inst.addOperand(MCOperand::createImm(Imm & 1)); in DecodeMemExtend()
530 Inst.addOperand(MCOperand::createImm(Imm)); in DecodeMRSSystemRegister()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEAsmPrinter.cpp | 98 MCOperand czero = MCOperand::createImm(0); in emitBSIC()
109 MCOperand CZero = MCOperand::createImm(0); in emitLEAzzi()
121 MCOperand CZero = MCOperand::createImm(0); in emitLEASLzzi()
133 MCOperand CZero = MCOperand::createImm(0); in emitLEAzii()
175 MCOperand M032 = MCOperand::createImm(M0(32)); in emitHiLo()
210 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETGOTAndEmitMCInsts()
213 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETGOTAndEmitMCInsts()
256 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETFunPLTAndEmitMCInsts()
259 MCOperand M032 = MCOperand::createImm(M0(32)); in lowerGETFunPLTAndEmitMCInsts()
302 MCOperand cim24 = MCOperand::createImm(-24); in lowerGETTLSAddrAndEmitMCInsts()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AVR/Disassembler/ |
| H A D | AVRDisassembler.cpp | 148 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOARr()
164 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIORdA()
172 Inst.addOperand(MCOperand::createImm(addr)); in decodeFIOBIT()
173 Inst.addOperand(MCOperand::createImm(b)); in decodeFIOBIT()
182 Inst.addOperand(MCOperand::createImm(Field << 1)); in decodeCallTarget()
243 Inst.addOperand(MCOperand::createImm(k)); in decodeFWRdK()
273 Inst.addOperand(MCOperand::createImm(Insn & 0x3f)); in decodeMemri()
293 Inst.addOperand(MCOperand::createImm(Offset)); in decodeFBRk()
320 Inst.addOperand(MCOperand::createImm(Offset)); in decodeCondBranch()
324 Inst.addOperand(MCOperand::createImm(Insn & 7)); in decodeCondBranch()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/Disassembler/ |
| H A D | PPCDisassembler.cpp | 70 Inst.addOperand(MCOperand::createImm(SignExtend32<14>(Imm))); in decodeCondBrTarget()
78 Inst.addOperand(MCOperand::createImm(Offset)); in decodeDirectBrTarget()
255 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand()
265 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
274 Inst.addOperand(MCOperand::createImm(Imm)); in decodeImmZeroOperand()
291 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Imm << 2))); in decodeDispRIXOperand()
304 Inst.addOperand(MCOperand::createImm(Disp)); in decodeDispRIHashOperand()
312 Inst.addOperand(MCOperand::createImm(SignExtend64<16>(Imm << 4))); in decodeDispRIX16Operand()
323 Inst.addOperand(MCOperand::createImm(Disp << 3)); in decodeDispSPE8Operand()
334 Inst.addOperand(MCOperand::createImm(Disp << 2)); in decodeDispSPE4Operand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVAsmPrinter.cpp | 311 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->SrcLang))); in outputDebugSourceAndStrings()
313 MCOperand::createImm(static_cast<unsigned>(MAI->SrcLangVersion))); in outputDebugSourceAndStrings()
334 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Addr))); in outputOpMemoryModel()
335 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(MAI->Mem))); in outputOpMemoryModel()
383 Inst.addOperand(MCOperand::createImm(Cap)); in outputGlobalRequirements()
446 Inst.addOperand(MCOperand::createImm(Const->getZExtValue())); in addOpsFromMDNode()
462 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM))); in outputExecutionModeFromMDNode()
469 Inst.addOperand(MCOperand::createImm(DefVal)); in outputExecutionModeFromMDNode()
481 Inst.addOperand(MCOperand::createImm(static_cast<unsigned>(EM))); in outputExecutionModeFromNumthreadsAttribute()
490 Inst.addOperand(MCOperand::createImm(V)); in outputExecutionModeFromNumthreadsAttribute()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/Disassembler/ |
| H A D | ARMDisassembler.cpp | 992 CCI = MI.insert(CCI, MCOperand::createImm(CC)); in AddThumbPredicate()
1010 VCCI = MI.insert(VCCI, MCOperand::createImm(VCC)); in AddThumbPredicate()
1649 Inst.addOperand(MCOperand::createImm(Val)); in DecodePredicateOperand()
1700 Inst.addOperand(MCOperand::createImm(Op)); in DecodeSORegImmOperand()
1736 Inst.addOperand(MCOperand::createImm(Shift)); in DecodeSORegRegOperand()
1865 Inst.addOperand(MCOperand::createImm(~(msb_mask ^ lsb_mask))); in DecodeBitfieldMaskOperand()
1955 Inst.addOperand(MCOperand::createImm(coproc)); in DecodeCopMemInstruction()
1956 Inst.addOperand(MCOperand::createImm(CRd)); in DecodeCopMemInstruction()
1994 Inst.addOperand(MCOperand::createImm(imm)); in DecodeCopMemInstruction()
2017 Inst.addOperand(MCOperand::createImm(imm)); in DecodeCopMemInstruction()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/Disassembler/ |
| H A D | LanaiDisassembler.cpp | 132 Instr.addOperand(MCOperand::createImm(AluOp)); in PostOperandDecodeAdjust()
187 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeRiMemoryValue()
213 Inst.addOperand(MCOperand::createImm(SignExtend32<10>(Offset))); in decodeSplsValue()
230 MI.addOperand(MCOperand::createImm(Insn)); in decodeBranch()
238 Inst.addOperand(MCOperand::createImm(SignExtend32<16>(Offset))); in decodeShiftImm()
248 Inst.addOperand(MCOperand::createImm(Val)); in decodePredicateOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/ |
| H A D | AMDGPUDisassembler.cpp | 104 return addOperand(Inst, MCOperand::createImm(Imm)); in decodeSOPPBrTarget()
118 return addOperand(Inst, MCOperand::createImm(Offset)); in decodeSMEMOffset()
785 insertNamedMCOperand(MI, MCOperand::createImm(0), in getInstruction()
792 insertNamedMCOperand(MI, MCOperand::createImm(0), in getInstruction()
798 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::gds); in getInstruction()
810 insertNamedMCOperand(MI, MCOperand::createImm(CPol), in getInstruction()
827 MI.insert(TFEIter, MCOperand::createImm(0)); in getInstruction()
838 MI.insert(SWZIter, MCOperand::createImm(0)); in getInstruction()
918 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::vm); in convertEXPInst()
919 insertNamedMCOperand(MI, MCOperand::createImm(0), AMDGPU::OpName::compr); in convertEXPInst()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/AsmParser/ |
| H A D | LanaiAsmParser.cpp | 391 Inst.addOperand(MCOperand::createImm(0)); in addExpr()
394 MCOperand::createImm(static_cast<int32_t>(ConstExpr->getValue()))); in addExpr()
435 Inst.addOperand(MCOperand::createImm(getMemOp())); in addMemRegImmOperands()
443 Inst.addOperand(MCOperand::createImm(getMemOp())); in addMemRegRegOperands()
467 MCOperand::createImm(static_cast<int32_t>(ConstExpr->getValue()))); in addLoImm16Operands()
489 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() & 0xffff)); in addLoImm16AndOperands()
497 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() >> 16)); in addHiImm16Operands()
519 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() >> 16)); in addHiImm16AndOperands()
527 Inst.addOperand(MCOperand::createImm(ConstExpr->getValue() & 0x1fffff)); in addLoImm21Operands()
600 static std::unique_ptr<LanaiOperand> createImm(const MCExpr *Value, in createImm() function
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/Disassembler/ |
| H A D | RISCVDisassembler.cpp | 399 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand()
412 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperandGE()
425 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeUImmPlus1OperandGE()
434 Inst.addOperand(MCOperand::createImm(Slist[Imm])); in decodeUImmSlistOperand()
447 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmLog2XLenOperand()
473 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeUImmPlus1Operand()
483 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
504 Inst.addOperand(MCOperand::createImm(SignExtend64<T>(Imm << N))); in decodeSImmOperandAndLslN()
515 Inst.addOperand(MCOperand::createImm(Imm)); in decodeCLUIImmOperand()
525 Inst.addOperand(MCOperand::createImm(Imm)); in decodeFRMArg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/CSKY/Disassembler/ |
| H A D | CSKYDisassembler.cpp | 231 Inst.addOperand(MCOperand::createImm(Imm << S)); in decodeUImmOperand()
240 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeOImmOperand()
248 Inst.addOperand(MCOperand::createImm((Imm & 0x7F) << 2)); in decodeLRW16Imm8()
251 Inst.addOperand(MCOperand::createImm(V << 2)); in decodeLRW16Imm8()
263 Inst.addOperand(MCOperand::createImm(16)); in decodeJMPIXImmOperand()
265 Inst.addOperand(MCOperand::createImm(24)); in decodeJMPIXImmOperand()
267 Inst.addOperand(MCOperand::createImm(32)); in decodeJMPIXImmOperand()
269 Inst.addOperand(MCOperand::createImm(40)); in decodeJMPIXImmOperand()
364 Inst.addOperand(MCOperand::createImm(Log2_64(Imm))); in decodeImmShiftOpValue()
374 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm) << S)); in decodeSImmOperand()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/Disassembler/ |
| H A D | VEDisassembler.cpp | 333 MI.addOperand(MCOperand::createImm(0)); in DecodeASX()
342 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeASX()
346 MI.addOperand(MCOperand::createImm(simm32)); in DecodeASX()
364 MI.addOperand(MCOperand::createImm(0)); in DecodeAS()
368 MI.addOperand(MCOperand::createImm(simm32)); in DecodeAS()
493 MI.addOperand(MCOperand::createImm(sy)); in DecodeCAS()
495 MI.addOperand(MCOperand::createImm(SignExtend32<7>(sy))); in DecodeCAS()
538 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM7()
545 MI.addOperand(MCOperand::createImm(tgt)); in DecodeSIMM32()
588 MI.addOperand(MCOperand::createImm(VEValToCondCode(cf, isIntegerBCKind(MI)))); in DecodeCCOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrInfo.cpp | 35 NopInst.addOperand(MCOperand::createImm(0)); in getNop()
36 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop()
42 NopInst.addOperand(MCOperand::createImm(ARMCC::AL)); in getNop()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/Disassembler/ |
| H A D | WebAssemblyDisassembler.cpp | 107 MI.addOperand(MCOperand::createImm(Val)); in parseLEBImmediate()
122 MI.addOperand(MCOperand::createImm(static_cast<int64_t>(Val))); in parseImmediate()
233 MCOperand::createImm(int64_t(WebAssembly::BlockType::Invalid))); in getInstruction()
235 MI.addOperand(MCOperand::createImm(Val & 0x7f)); in getInstruction()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/AsmParser/ |
| H A D | ARMAsmParser.cpp | 303 ITInst.addOperand(MCOperand::createImm(ITState.Cond)); in flushPendingInstructions()
304 ITInst.addOperand(MCOperand::createImm(ITState.Mask)); in flushPendingInstructions()
2516 Inst.addOperand(MCOperand::createImm(0)); in addExpr()
2518 Inst.addOperand(MCOperand::createImm(CE->getValue())); in addExpr()
2535 Inst.addOperand(MCOperand::createImm(unsigned(getCondCode()))); in addCondCodeOperands()
2542 Inst.addOperand(MCOperand::createImm(unsigned(getVPTPred()))); in addVPTPredNOperands()
2567 Inst.addOperand(MCOperand::createImm(getCoproc())); in addCoprocNumOperands()
2572 Inst.addOperand(MCOperand::createImm(getCoproc())); in addCoprocRegOperands()
2577 Inst.addOperand(MCOperand::createImm(CoprocOption.Val)); in addCoprocOptionOperands()
2582 Inst.addOperand(MCOperand::createImm(ITMask.Mask)); in addITMaskOperands()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/Disassembler/ |
| H A D | MSP430Disassembler.cpp | 125 MI.addOperand(MCOperand::createImm(Imm)); in DecodeCGImm()
139 MI.addOperand(MCOperand::createImm((int16_t)Imm)); in DecodeMemOperand()
348 MI.addOperand(MCOperand::createImm(SignExtend32(Offset, 10))); in getInstructionCJ()
354 MI.addOperand(MCOperand::createImm(getCondCode(Cond))); in getInstructionCJ()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/Disassembler/ |
| H A D | SystemZDisassembler.cpp | 186 Inst.addOperand(MCOperand::createImm(Imm)); in decodeUImmOperand()
194 Inst.addOperand(MCOperand::createImm(SignExtend64<N>(Imm))); in decodeSImmOperand()
276 Inst.addOperand(MCOperand::createImm(Imm + 1)); in decodeLenOperand()
289 Inst.addOperand(MCOperand::createImm(Value)); in decodePCDBLOperand()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/LoongArch/Disassembler/ |
| H A D | LoongArchDisassembler.cpp | 143 Inst.addOperand(MCOperand::createImm(Imm + P)); in decodeUImmOperand()
154 Inst.addOperand(MCOperand::createImm(SignExtend64<N + S>(Imm << S))); in decodeSImmOperand()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/XCore/Disassembler/ |
| H A D | XCoreDisassembler.cpp | 205 Inst.addOperand(MCOperand::createImm(Values[Val])); in DecodeBitpOperand()
212 Inst.addOperand(MCOperand::createImm(-(int64_t)Val)); in DecodeNegImmOperand()
341 Inst.addOperand(MCOperand::createImm(Op1)); in Decode2RImmInstruction()
382 Inst.addOperand(MCOperand::createImm(Op2)); in DecodeRUSInstruction()
531 Inst.addOperand(MCOperand::createImm(Op1)); in Decode3RImmInstruction()
546 Inst.addOperand(MCOperand::createImm(Op3)); in Decode2RUSInstruction()
602 Inst.addOperand(MCOperand::createImm(Op3)); in DecodeL2RUSInstruction()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/Disassembler/ |
| H A D | SparcDisassembler.cpp | 338 MI.addOperand(MCOperand::createImm(CallOffset)); in DecodeCall()
345 MI.addOperand(MCOperand::createImm(SignExtend64<5>(insn))); in DecodeSIMM5()
352 MI.addOperand(MCOperand::createImm(SignExtend64<13>(insn))); in DecodeSIMM13()
363 MI.addOperand(MCOperand::createImm(BranchOffset)); in DecodeDisp()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/AsmParser/ |
| H A D | RISCVAsmParser.cpp | 1100 static std::unique_ptr<RISCVOperand> createImm(const MCExpr *Val, SMLoc S, in createImm() function
1186 MCOperand::createImm(fixImmediateForRV32(Imm, IsRV64Imm))); in addExpr()
1207 Inst.addOperand(MCOperand::createImm(SignExtend64<10>(Imm))); in addSImm10UnsignedOperands()
1219 Inst.addOperand(MCOperand::createImm(Imm)); in addFPImmOperands()
1224 Inst.addOperand(MCOperand::createImm(Fence.Val)); in addFenceArgOperands()
1229 Inst.addOperand(MCOperand::createImm(SysReg.Encoding)); in addCSRSystemRegisterOperands()
1244 Inst.addOperand(MCOperand::createImm(Imm)); in addVTypeIOperands()
1249 Inst.addOperand(MCOperand::createImm(RegList.Encoding)); in addRegListOperands()
1260 Inst.addOperand(MCOperand::createImm(StackAdj.Val)); in addStackAdjOperands()
1265 Inst.addOperand(MCOperand::createImm(getFRM())); in addFRMArgOperands()
[all …]
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