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Searched refs:createAndComputeVirtRegInterval (Results 1 – 17 of 17) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIWholeQuadMode.cpp750 LIS->createAndComputeVirtRegInterval(SaveReg); in saveSCC()
1030 LIS->createAndComputeVirtRegInterval(CndReg); in lowerKillI1()
1033 LIS->createAndComputeVirtRegInterval(TmpReg); in lowerKillI1()
1035 LIS->createAndComputeVirtRegInterval(LiveMaskWQM); in lowerKillI1()
1411 LIS->createAndComputeVirtRegInterval(SavedNonStrictReg); in processBlock()
1439 LIS->createAndComputeVirtRegInterval(SavedWQMReg); in processBlock()
1506 LIS->createAndComputeVirtRegInterval(Reg); in lowerCopyInstrs()
1592 LIS->createAndComputeVirtRegInterval(EntryExec); in lowerInitExec()
1675 LIS->createAndComputeVirtRegInterval(InputReg); in lowerInitExec()
1676 LIS->createAndComputeVirtRegInterval(CountReg); in lowerInitExec()
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H A DGCNPreRAOptimizations.cpp193 LIS->createAndComputeVirtRegInterval(RegToUpdate); in processReg()
221 LIS->createAndComputeVirtRegInterval(Reg); in processReg()
H A DSILowerControlFlow.cpp309 LIS->createAndComputeVirtRegInterval(Tmp); in emitIf()
311 LIS->createAndComputeVirtRegInterval(CopyReg); in emitIf()
371 LIS->createAndComputeVirtRegInterval(SaveReg); in emitElse()
424 LIS->createAndComputeVirtRegInterval(AndReg); in emitIfBreak()
857 LIS->createAndComputeVirtRegInterval(Reg); in run()
H A DSIOptimizeExecMaskingPreRA.cpp233 LIS->createAndComputeVirtRegInterval(CCReg); in optimizeVcndVcmpPair()
346 LIS->createAndComputeVirtRegInterval(DstReg); in optimizeElseBranch()
503 LIS->createAndComputeVirtRegInterval(Reg); in run()
H A DSIFormMemoryClauses.cpp407 LIS->createAndComputeVirtRegInterval(Reg); in run()
415 LIS->createAndComputeVirtRegInterval(Reg); in run()
H A DAMDGPURewriteAGPRCopyMFMA.cpp226 LIS.createAndComputeVirtRegInterval(VReg); in run()
H A DGCNRewritePartialRegUses.cpp370 LIS->createAndComputeVirtRegInterval(NewReg); in updateLiveIntervals()
H A DSILowerSGPRSpills.cpp502 LIS->createAndComputeVirtRegInterval(Reg); in run()
H A DGCNSchedStrategy.cpp1991 DAG.LIS->createAndComputeVirtRegInterval(RematReg); in rematerialize()
2089 DAG.LIS->createAndComputeVirtRegInterval(Reg); in finalizeGCNSchedStage()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64PostCoalescerPass.cpp84 LIS->createAndComputeVirtRegInterval(Src); in INITIALIZE_PASS_DEPENDENCY()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyRegStackify.cpp574 LIS->createAndComputeVirtRegInterval(NewReg); in moveForSingleUse()
617 LIS.createAndComputeVirtRegInterval(NewReg); in rematerializeCheapDef()
699 LIS.createAndComputeVirtRegInterval(TeeReg); in moveAndTeeForMultiUse()
700 LIS.createAndComputeVirtRegInterval(DefReg); in moveAndTeeForMultiUse()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DLiveIntervals.h137 return createAndComputeVirtRegInterval(Reg); in getInterval()
157 LiveInterval &createAndComputeVirtRegInterval(Register Reg) { in createAndComputeVirtRegInterval() function
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCVSXFMAMutate.cpp291 LIS->createAndComputeVirtRegInterval(KilledProdReg); in processBlock()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVInsertVSETVLI.cpp1110 LIS->createAndComputeVirtRegInterval(DestReg); in insertVSETVLI()
1147 LIS->createAndComputeVirtRegInterval(AVLCopyReg); in insertVSETVLI()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonExpandCondsets.cpp528 LIS->createAndComputeVirtRegInterval(Reg); in recalculateLiveInterval()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DLiveIntervals.cpp1751 createAndComputeVirtRegInterval(Reg); in repairIntervalsInRange()
H A DTwoAddressInstructionPass.cpp1958 LIS->createAndComputeVirtRegInterval(Reg); in run()