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Searched refs:cores (Results 1 – 25 of 148) sorted by relevance

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/freebsd/sys/arm64/arm64/
H A Dmp_machdep.c843 u_int *cores = arg; in cpu_count_acpi_handler() local
847 (*cores)++; in cpu_count_acpi_handler()
859 u_int cores; in cpu_count_acpi() local
871 cores = 0; in cpu_count_acpi()
873 cpu_count_acpi_handler, &cores); in cpu_count_acpi()
877 return (cores); in cpu_count_acpi()
884 int cores; in cpu_mp_setmaxid() local
892 cores = cpu_count_acpi(); in cpu_mp_setmaxid()
893 if (cores > 0) { in cpu_mp_setmaxid()
894 cores = MIN(cores, MAXCPU); in cpu_mp_setmaxid()
[all …]
/freebsd/sys/riscv/riscv/
H A Dmp_machdep.c465 int cores; in cpu_mp_setmaxid() local
468 cores = ofw_cpu_early_foreach(cpu_check_mmu, true); in cpu_mp_setmaxid()
469 if (cores > 0) { in cpu_mp_setmaxid()
470 cores = MIN(cores, MAXCPU); in cpu_mp_setmaxid()
472 printf("Found %d CPUs in the device tree\n", cores); in cpu_mp_setmaxid()
473 mp_ncpus = cores; in cpu_mp_setmaxid()
474 mp_maxid = cores - 1; in cpu_mp_setmaxid()
485 if (TUNABLE_INT_FETCH("hw.ncpu", &cores)) { in cpu_mp_setmaxid()
486 if (cores > 0 && cores < mp_ncpus) { in cpu_mp_setmaxid()
487 mp_ncpus = cores; in cpu_mp_setmaxid()
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/freebsd/sys/amd64/vmm/
H A Dx86.c88 uint16_t cores, maxcpus, sockets, threads; in x86_emulate_cpuid() local
143 vm_get_topology(vm, &sockets, &cores, &threads, in x86_emulate_cpuid()
155 width = MIN(0xF, log2(threads * cores)); in x86_emulate_cpuid()
156 logical_cpus = MIN(0xFF, threads * cores - 1); in x86_emulate_cpuid()
241 vm_get_topology(vm, &sockets, &cores, &threads, in x86_emulate_cpuid()
255 logical_cpus = threads * cores; in x86_emulate_cpuid()
260 logical_cpus = sockets * threads * cores; in x86_emulate_cpuid()
289 vm_get_topology(vm, &sockets, &cores, &threads, in x86_emulate_cpuid()
389 vm_get_topology(vm, &sockets, &cores, &threads, in x86_emulate_cpuid()
391 logical_cpus = threads * cores; in x86_emulate_cpuid()
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/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Dsnps,arc-timer.txt4 - Two identical copies TIMER0 and TIMER1 exist in ARC cores and historically
5 TIMER0 used as clockevent provider (true for all ARC cores)
12 (16 for ARCHS cores, 3 for ARC700 cores)
/freebsd/sys/dev/bhnd/bhndb/
H A Dbhndb_pci.c112 struct bhnd_core_info **cores, u_int *ncores);
114 struct bhnd_core_info *cores);
169 struct bhnd_core_info *cores; /**< erom-owned core table */ member
357 struct bhnd_core_info *cores, hostb_core; in bhndb_pci_attach() local
374 cores = NULL; in bhndb_pci_attach()
442 error = bhndb_pci_probe_copy_core_table(probe, &cores, &ncores); in bhndb_pci_attach()
444 cores = NULL; in bhndb_pci_attach()
452 error = bhndb_attach(dev, &cid, cores, ncores, &hostb_core, erom_class); in bhndb_pci_attach()
463 bhndb_pci_probe_free_core_table(cores); in bhndb_pci_attach()
476 if (cores != NULL) in bhndb_pci_attach()
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H A Dbhndbvar.h64 struct bhnd_core_info *cores, u_int ncores,
82 struct bhnd_core_info *cores, u_int ncores,
H A Dbhndb.c80 struct bhnd_core_info *cores, u_int ncores,
86 struct bhnd_core_info *cores, u_int ncores,
90 struct bhnd_core_info *cores, u_int ncores,
185 bhndb_hw_matches(struct bhndb_softc *sc, struct bhnd_core_info *cores, in bhndb_hw_matches() argument
196 struct bhnd_core_info *core = &cores[d]; in bhndb_hw_matches()
229 struct bhndb_resources *br, struct bhnd_core_info *cores, u_int ncores, in bhndb_init_region_cfg() argument
252 core = &cores[i]; in bhndb_init_region_cfg()
342 core = &cores[i]; in bhndb_init_region_cfg()
470 bhndb_find_hwspec(struct bhndb_softc *sc, struct bhnd_core_info *cores, in bhndb_find_hwspec() argument
478 if (!bhndb_hw_matches(sc, cores, ncores, next)) in bhndb_find_hwspec()
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/freebsd/sys/contrib/device-tree/Bindings/media/xilinx/
H A Dvideo.txt1 DT bindings for Xilinx video IP cores
4 Xilinx video IP cores process video streams by acting as video sinks and/or
10 cores are represented as defined in ../video-interfaces.txt.
18 The following properties are common to all Xilinx video IP cores.
21 AXI bus between video IP cores, using its VF code as defined in "AXI4-Stream
H A Dxlnx,video.txt8 video IP cores. Each video IP core is represented as documented in video.txt
11 mappings between DMAs and the video IP cores.
/freebsd/sys/modules/bhnd/
H A DMakefile2 .PATH: ${SRCTOP}/sys/dev/bhnd/cores/chipc
3 .PATH: ${SRCTOP}/sys/dev/bhnd/cores/chipc/pwrctl
4 .PATH: ${SRCTOP}/sys/dev/bhnd/cores/pmu
68 cores \
/freebsd/sys/dev/bhnd/
H A Dbhnd_erom.h166 bhnd_erom_get_core_table(bhnd_erom_t *erom, struct bhnd_core_info **cores, in bhnd_erom_get_core_table() argument
169 return (BHND_EROM_GET_CORE_TABLE(erom, cores, num_cores)); in bhnd_erom_get_core_table()
179 bhnd_erom_free_core_table(bhnd_erom_t *erom, struct bhnd_core_info *cores) in bhnd_erom_free_core_table() argument
181 return (BHND_EROM_FREE_CORE_TABLE(erom, cores)); in bhnd_erom_free_core_table()
H A Dbhnd_erom_if.m114 * Parse all cores descriptors, returning the array in @p cores and the count
121 * @param[out] cores The table of parsed core descriptors.
122 * @param[out] num_cores The number of core records in @p cores.
130 struct bhnd_core_info **cores;
138 * @param cores A core table allocated by @p erom.
142 struct bhnd_core_info *cores;
/freebsd/sys/contrib/device-tree/Bindings/bus/
H A Dbrcm,bus-axi.txt9 The cores on the AXI bus are automatically detected by bcma with the
12 BCM47xx/BCM53xx ARM SoCs. To assign IRQ numbers to the cores, provide
17 The top-level axi bus may contain children representing attached cores
19 detected (e.g. IRQ numbers). Also some of the cores may be responsible
/freebsd/tools/tools/netmap/
H A Dnmreplay.c1109 int cores[4] = { 2, 8, 4, 10 }; /* default values */ in main() local
1157 cores[0] = atoi(av[0]); in main()
1158 cores[1] = cores[0] + 1; in main()
1159 cores[2] = cores[1] + 1; in main()
1160 cores[3] = cores[2] + 1; in main()
1162 cores[0] = atoi(av[0]); in main()
1163 cores[1] = cores[0] + 1; in main()
1164 cores[2] = atoi(av[1]); in main()
1165 cores[3] = cores[2] + 1; in main()
1167 cores[0] = atoi(av[0]); in main()
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/freebsd/sys/dev/vmm/
H A Dvmm_vm.c353 vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores, in vm_get_topology() argument
357 *cores = vm->cores; in vm_get_topology()
363 vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores, in vm_set_topology() argument
367 if (sockets * cores * threads > vm->maxcpus) in vm_set_topology()
370 vm->cores = cores; in vm_set_topology()
H A Dvmm_vm.h151 uint16_t cores; /* (o) num of cores/socket */ member
178 void vm_get_topology(struct vm *vm, uint16_t *sockets, uint16_t *cores,
180 int vm_set_topology(struct vm *vm, uint16_t sockets, uint16_t cores,
/freebsd/tools/tools/netrate/tcpp/
H A Dparallelism.csh12 set cores=8
19 foreach core (`jot $cores`)
/freebsd/sys/modules/bhnd/cores/bhnd_pci/
H A DMakefile1 .PATH: ${SRCTOP}/sys/dev/bhnd/cores/pci
2 .PATH: ${SRCTOP}/sys/dev/bhnd/cores/pcie2
/freebsd/sys/modules/bhnd/cores/bhnd_pcib/
H A DMakefile1 .PATH: ${SRCTOP}/sys/dev/bhnd/cores/pci
2 .PATH: ${SRCTOP}/sys/dev/bhnd/cores/pcie2
/freebsd/sys/modules/bhnd/cores/bhnd_pci_hostb/
H A DMakefile1 .PATH: ${SRCTOP}/sys/dev/bhnd/cores/pci
2 .PATH: ${SRCTOP}/sys/dev/bhnd/cores/pcie2
/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dvexpress-v2p-ca15-tc1.dts199 regulator-cores {
210 amp-cores {
211 /* Total current for the two cores */
224 power-cores {
H A Dvexpress-v2p-ca15_a7.dts360 /* Total current for the two A15 cores */
367 /* Total current for the three A7 cores */
381 /* Total power for the two A15 cores */
388 /* Total power for the three A7 cores */
395 /* Total energy for the two A15 cores */
402 /* Total energy for the three A7 cores */
/freebsd/sys/contrib/device-tree/src/arm64/qcom/
H A Dsdm632.dtsi45 * cpu0-3 are efficiency cores, cpu4-7 are performance cores
/freebsd/sys/contrib/device-tree/Bindings/
H A Dxilinx.txt1 d) Xilinx IP cores
3 The Xilinx EDK toolchain ships with a set of IP cores (devices) for use
14 device drivers how the IP cores are configured, but it requires the kernel
20 properties of the device node. In general, device nodes for IP-cores
89 That covers the general approach to binding xilinx IP cores into the
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos5422-odroidxu3-lite.dts39 * than Odroid XU3/XU4 boards: 1.8 GHz for A15 cores & 1.3 GHz for A7 cores.

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