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Searched refs:constrainSelectedInstRegOperands (Results 1 – 16 of 16) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMipsInstructionSelector.cpp152 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
158 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
165 return constrainSelectedInstRegOperands(*Inst, TII, TRI, RBI); in materialize32BitImm()
173 if (!constrainSelectedInstRegOperands(*LUi, TII, TRI, RBI)) in materialize32BitImm()
175 if (!constrainSelectedInstRegOperands(*ORi, TII, TRI, RBI)) in materialize32BitImm()
267 if (!constrainSelectedInstRegOperands(*NewInst, TII, TRI, RBI)) in buildUnalignedStore()
282 if (!constrainSelectedInstRegOperands(*NewInst, TII, TRI, RBI)) in buildUnalignedLoad()
306 if (!constrainSelectedInstRegOperands(*Mul, TII, TRI, RBI)) in select()
330 if (!constrainSelectedInstRegOperands(*PseudoMULTu, TII, TRI, RBI)) in select()
336 if (!constrainSelectedInstRegOperands(*PseudoMove, TII, TRI, RBI)) in select()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMInstructionSelector.cpp586 if (!constrainSelectedInstRegOperands(*CmpI, TII, TRI, RBI)) in insertComparison()
594 if (!constrainSelectedInstRegOperands(*ReadI, TII, TRI, RBI)) in insertComparison()
605 if (!constrainSelectedInstRegOperands(*Mov1I, TII, TRI, RBI)) in insertComparison()
704 if (!constrainSelectedInstRegOperands(*MIBLoad, TII, TRI, RBI)) in selectGlobal()
711 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
718 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
733 if (!constrainSelectedInstRegOperands(*OffsetMIB, TII, TRI, RBI)) in selectGlobal()
744 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
766 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectGlobal()
783 if (!constrainSelectedInstRegOperands(*CmpI, TII, TRI, RBI)) in selectSelect()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/
H A DAArch64InstructionSelector.cpp1191 constrainSelectedInstRegOperands(*FCSel, TII, TRI, RBI); in emitSelect()
1340 constrainSelectedInstRegOperands(*SelectInst, TII, TRI, RBI); in emitSelect()
1616 constrainSelectedInstRegOperands(*TestBitMI, TII, TRI, RBI); in emitTestBit()
1678 constrainSelectedInstRegOperands(*BranchMI, TII, TRI, RBI); in emitCBZ()
1839 constrainSelectedInstRegOperands(*TstMI, TII, TRI, RBI); in selectCompareBranch()
1844 return constrainSelectedInstRegOperands(*Bcc, TII, TRI, RBI); in selectCompareBranch()
1931 constrainSelectedInstRegOperands(*Shl, TII, TRI, RBI); in selectVectorSHL()
1988 constrainSelectedInstRegOperands(*Neg, TII, TRI, RBI); in selectVectorAshrLshr()
1990 constrainSelectedInstRegOperands(*SShl, TII, TRI, RBI); in selectVectorAshrLshr()
2022 constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectVaStartDarwin()
[all …]
H A DAArch64LegalizerInfo.cpp1793 constrainSelectedInstRegOperands(*NewI, *ST->getInstrInfo(), in legalizeLoadStore()
2102 constrainSelectedInstRegOperands(*CAS, *ST->getInstrInfo(), in legalizeAtomicCmpxchg128()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/
H A DRISCVInstructionSelector.cpp632 return constrainSelectedInstRegOperands(*Bcc, TII, TRI, RBI); in select()
689 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in select()
698 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in select()
737 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in selectMergeValues()
753 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in selectUnmergeValues()
974 if (!constrainSelectedInstRegOperands(*Result, TII, TRI, RBI)) in materializeImm()
1008 return constrainSelectedInstRegOperands(MI, TII, TRI, RBI); in selectAddr()
1026 if (!constrainSelectedInstRegOperands(*Result, TII, TRI, RBI)) in selectAddr()
1047 if (!constrainSelectedInstRegOperands(*AddrHi, TII, TRI, RBI)) in selectAddr()
1053 if (!constrainSelectedInstRegOperands(*Result, TII, TRI, RBI)) in selectAddr()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86InstructionSelector.cpp
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/
H A DX86InstructionSelector.cpp615 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectLoadStoreOp()
629 bool Constrained = constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectLoadStoreOp()
668 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectFrameIndexOrGep()
714 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectGlobalValue()
761 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectConstant()
914 constrainSelectedInstRegOperands(AndInst, TII, TRI, RBI); in selectZext()
1019 constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); in selectCmp()
1020 constrainSelectedInstRegOperands(SetInst, TII, TRI, RBI); in selectCmp()
1086 constrainSelectedInstRegOperands(CmpInst, TII, TRI, RBI); in selectFCmp()
1087 constrainSelectedInstRegOperands(Set1, TII, TRI, RBI); in selectFCmp()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp308 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_AND_OR_XOR()
334 return constrainSelectedInstRegOperands(*Add, TII, TRI, RBI); in selectG_ADD_SUB()
342 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_ADD_SUB()
355 return constrainSelectedInstRegOperands(*Add, TII, TRI, RBI); in selectG_ADD_SUB()
396 if (!constrainSelectedInstRegOperands(*Addc, TII, TRI, RBI)) in selectG_ADD_SUB()
433 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_UADDO_USUBO_UADDE_USUBE()
489 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in selectG_AMDGPU_MAD_64_32()
705 if (!constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI)) in selectG_BUILD_VECTOR()
712 if (!constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI)) in selectG_BUILD_VECTOR()
759 return constrainSelectedInstRegOperands(*MIB, TII, TRI, RBI); in selectG_BUILD_VECTOR()
[all …]
H A DAMDGPURegisterBankInfo.cpp1546 if (!constrainSelectedInstRegOperands(*MIB, *TII, *TRI, *this)) in applyMappingBFE()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/
H A DPPCInstructionSelector.cpp208 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in selectIntToFP()
238 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in selectFPToInt()
272 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in selectZExt()
705 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in selectConstantPool()
763 return constrainSelectedInstRegOperands(*LoadStore, TII, TRI, RBI); in select()
/freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/
H A DSPIRVGlobalRegistry.cpp259 constrainSelectedInstRegOperands(*MIB, *ST.getInstrInfo(), in getOrCreateConstFP()
291 constrainSelectedInstRegOperands(*MIB, *ST.getInstrInfo(), in getOrCreateConstInt()
335 constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(), in buildConstantInt()
431 constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(), in getOrCreateCompositeOrNull()
645 constrainSelectedInstRegOperands(*MIB, *Subtarget.getInstrInfo(), in buildGlobalVariable()
1451 constrainSelectedInstRegOperands(*MIB, *ST.getInstrInfo(), in getOrCreateUndef()
H A DSPIRVInstructionSelector.cpp317 return constrainSelectedInstRegOperands(I, TII, TRI, RBI); in select()
1602 constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in buildI32Constant()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/
H A DUtils.h143 bool constrainSelectedInstRegOperands(MachineInstr &I,
H A DGIMatchTableExecutorImpl.h1410 constrainSelectedInstRegOperands(*OutMIs[InsnID].getInstr(), TII, TRI, in executeMatchTable()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DMachineInstrBuilder.h342 return constrainSelectedInstRegOperands(*MI, TII, TRI, RBI); in constrainAllUses()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/
H A DUtils.cpp155 bool llvm::constrainSelectedInstRegOperands(MachineInstr &I, in constrainSelectedInstRegOperands() function in llvm