| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUInstructionSelector.cpp | 119 return RBI.constrainGenericRegister(Dst.getReg(), *DstRC, *MRI) && in constrainCopyLikeIntrin()
120 RBI.constrainGenericRegister(Src.getReg(), *SrcRC, *MRI); in constrainCopyLikeIntrin()
139 return RBI.constrainGenericRegister(DstReg, *RC, *MRI); in selectCOPY()
144 if (!RBI.constrainGenericRegister(DstReg, *TRI.getBoolRC(), *MRI)) in selectCOPY()
186 if (RC && !RBI.constrainGenericRegister(DstReg, *RC, *MRI)) in selectCOPY()
200 RBI.constrainGenericRegister(MO.getReg(), *RC, *MRI); in selectCOPY()
239 return RBI.constrainGenericRegister(DefReg, *DefRC, *MRI); in selectPHI()
407 if (!RBI.constrainGenericRegister(DstReg, RC, *MRI)) in selectG_ADD_SUB()
460 if (!RBI.constrainGenericRegister(Dst0Reg, AMDGPU::SReg_32RegClass, *MRI) || in selectG_UADDO_USUBO_UADDE_USUBE()
461 !RBI.constrainGenericRegister(Src0Reg, AMDGPU::SReg_32RegClass, *MRI) || in selectG_UADDO_USUBO_UADDE_USUBE()
[all …]
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| H A D | AMDGPURegisterBankInfo.cpp | 740 constrainGenericRegister(SrcPart, AMDGPU::VGPR_32RegClass, MRI); in buildReadFirstLane()
1850 return constrainGenericRegister(DstReg, AMDGPU::VGPR_32RegClass, MRI) && in buildVCopy()
1851 constrainGenericRegister(SrcReg, AMDGPU::SReg_32RegClass, MRI); in buildVCopy()
1870 return constrainGenericRegister(SrcReg, AMDGPU::SReg_64RegClass, MRI) && in buildVCopy()
1871 constrainGenericRegister(DstReg, AMDGPU::VReg_64RegClass, MRI); in buildVCopy()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstructionSelector.cpp | |
| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/GISel/ |
| H A D | X86InstructionSelector.cpp | 270 RBI.constrainGenericRegister(Reg, *RC, MRI); in selectDebugInstr()
344 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy()
779 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectTurnIntoCOPY()
780 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectTurnIntoCOPY()
842 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectTruncOrPtrToInt()
843 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectTruncOrPtrToInt()
952 if (!RBI.constrainGenericRegister(SrcReg, *SrcRC, MRI) || in selectAnyext()
953 !RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectAnyext()
1067 RBI.constrainGenericRegister( in selectFCmp()
1193 if (!RBI.constrainGenericRegister(CarryInReg, *DstRC, MRI)) in selectUAddSub()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| H A D | AArch64InstructionSelector.cpp | 938 RBI.constrainGenericRegister(I.getOperand(0).getReg(), *To, MRI); in copySubReg()
1000 RBI.constrainGenericRegister(Reg, *RC, MRI); in selectDebugInstr()
1079 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy()
2088 RBI.constrainGenericRegister(NewSrc, AArch64::GPR64RegClass, MRI); in preISelLower()
2318 RBI.constrainGenericRegister(DefReg, AArch64::GPR64RegClass, MRI); in earlySelect()
2321 RBI.constrainGenericRegister(DefReg, AArch64::GPR32RegClass, MRI); in earlySelect()
2487 return RBI.constrainGenericRegister(DefReg, *DefRC, MRI); in select()
2678 return RBI.constrainGenericRegister(DefReg, FPRRC, MRI); in select()
2691 if (!RBI.constrainGenericRegister(DefReg, FPRRC, MRI)) { in select()
2775 RBI.constrainGenericRegister(I.getOperand(0).getReg(), in select()
[all …]
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVInstructionSelector.cpp | 543 return RBI.constrainGenericRegister(DefReg, *DefRC, MRI); in select()
904 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy()
925 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectImplicitDef()
939 RBI.constrainGenericRegister(DstReg, RISCV::GPRRegClass, MRI); in materializeImm()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | RegisterBankInfo.h | 666 constrainGenericRegister(Register Reg, const TargetRegisterClass &RC,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstructionSelector.cpp | 225 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in selectCopy()
1158 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in select()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Mips/ |
| H A D | MipsInstructionSelector.cpp | 112 if (!RBI.constrainGenericRegister(DstReg, *RC, MRI)) { in selectCopy()
430 return RBI.constrainGenericRegister(DestReg, *DefRC, MRI); in select()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | RegisterBankInfo.cpp | 134 const TargetRegisterClass *RegisterBankInfo::constrainGenericRegister( in constrainGenericRegister() function in RegisterBankInfo
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| /freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/GISel/ |
| H A D | PPCInstructionSelector.cpp | 145 if (!RBI.constrainGenericRegister(DstReg, *DstRC, MRI)) { in selectCopy()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | Utils.cpp | 50 if (!RBI.constrainGenericRegister(Reg, RegClass, MRI)) in constrainRegToClass()
|