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Searched refs:composeSubRegIndices (Results 1 – 12 of 12) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp385 unsigned FinalA = composeSubRegIndices(IA.getSubReg(), SubA); in getCommonSuperRegClass()
394 unsigned FinalB = composeSubRegIndices(IB.getSubReg(), SubB); in getCommonSuperRegClass()
H A DRegisterCoalescer.cpp433 DstSub = tri.composeSubRegIndices(MI->getOperand(0).getSubReg(), in INITIALIZE_PASS_DEPENDENCY()
591 return TRI.composeSubRegIndices(SrcIdx, SrcSub) == in isCoalescable()
592 TRI.composeSubRegIndices(DstIdx, DstSub); in isCoalescable()
1382 unsigned NewDstIdx = TRI->composeSubRegIndices(CP.getSrcIdx(), DefSubIdx); in reMaterializeTrivialDef()
1930 unsigned SubUseIdx = TRI->composeSubRegIndices(SubIdx, MO.getSubReg()); in updateRegDefsUses()
2717 TRI->composeSubRegIndices(SubIdx, MO.getSubReg())); in computeWriteLanes()
3180 unsigned S = TRI->composeSubRegIndices(SubIdx, MO.getSubReg()); in usesLanes()
H A DDetectDeadLanes.cpp93 SrcSubIdx = TRI.composeSubRegIndices(SubReg, SrcSubIdx); in isCrossCopy()
H A DTailDuplicator.cpp457 TRI->composeSubRegIndices(VI->second.SubReg, MO.getSubReg())); in duplicateInstruction()
H A DMachineOperand.cpp86 SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg()); in substVirtReg()
H A DPeepholeOptimizer.cpp2002 TRI->composeSubRegIndices(RegSeqInput.SubReg, ReverseDefCompose); in getNextSourceFromRegSequence()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h728 unsigned composeSubRegIndices(unsigned a, unsigned b) const { in composeSubRegIndices() function
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIFoldOperands.cpp74 Copy.DefSubReg = TRI.composeSubRegIndices(DefSubReg, SubReg); in getWithSubReg()
H A DAMDGPUInstructionSelector.cpp350 unsigned ComposedSubIdx = TRI.composeSubRegIndices(MO.getSubReg(), SubIdx); in getSubOperand64()
H A DSIInstrInfo.cpp5911 unsigned NewSubIdx = RI.composeSubRegIndices(SuperReg.getSubReg(), SubIdx); in buildExtractSubReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2689 SubRegIdx = TRI->composeSubRegIndices(SubRegIdx, in decomposeSubvectorInsertExtractToSubRegs()
/freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/
H A DDemangleTestCases.inc13204 …egisterInfo20composeSubRegIndicesEjj", "llvm::X86GenRegisterInfo::composeSubRegIndices(unsigned in…
13672 …egisterInfo20composeSubRegIndicesEjj", "llvm::ARMGenRegisterInfo::composeSubRegIndices(unsigned in…
20646 …egisterInfo20composeSubRegIndicesEjj", "llvm::TargetRegisterInfo::composeSubRegIndices(unsigned in…