Home
last modified time | relevance | path

Searched refs:composeSubRegIndices (Results 1 – 9 of 9) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DTargetRegisterInfo.cpp347 unsigned FinalA = composeSubRegIndices(IA.getSubReg(), SubA); in getCommonSuperRegClass()
356 unsigned FinalB = composeSubRegIndices(IB.getSubReg(), SubB); in getCommonSuperRegClass()
H A DRegisterCoalescer.cpp427 DstSub = tri.composeSubRegIndices(MI->getOperand(0).getSubReg(), in INITIALIZE_PASS_DEPENDENCY()
583 return TRI.composeSubRegIndices(SrcIdx, SrcSub) == in isCoalescable()
584 TRI.composeSubRegIndices(DstIdx, DstSub); in isCoalescable()
1348 unsigned NewDstIdx = TRI->composeSubRegIndices(CP.getSrcIdx(), DefSubIdx); in reMaterializeTrivialDef()
1870 unsigned SubUseIdx = TRI->composeSubRegIndices(SubIdx, MO.getSubReg()); in updateRegDefsUses()
2656 TRI->composeSubRegIndices(SubIdx, MO.getSubReg())); in computeWriteLanes()
3119 unsigned S = TRI->composeSubRegIndices(SubIdx, MO.getSubReg()); in usesLanes()
H A DDetectDeadLanes.cpp93 SrcSubIdx = TRI.composeSubRegIndices(SubReg, SrcSubIdx); in isCrossCopy()
H A DTailDuplicator.cpp455 TRI->composeSubRegIndices(VI->second.SubReg, MO.getSubReg())); in duplicateInstruction()
H A DMachineOperand.cpp87 SubIdx = TRI.composeSubRegIndices(SubIdx, getSubReg()); in substVirtReg()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DTargetRegisterInfo.h702 unsigned composeSubRegIndices(unsigned a, unsigned b) const { in composeSubRegIndices() function
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DAMDGPUInstructionSelector.cpp252 unsigned ComposedSubIdx = TRI.composeSubRegIndices(MO.getSubReg(), SubIdx); in getSubOperand64()
H A DSIInstrInfo.cpp5659 unsigned NewSubIdx = RI.composeSubRegIndices(SuperReg.getSubReg(), SubIdx); in buildExtractSubReg()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp2550 SubRegIdx = TRI->composeSubRegIndices(SubRegIdx, in decomposeSubvectorInsertExtractToSubRegs()