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Searched refs:clock_cell (Results 1 – 4 of 4) sorted by relevance

/freebsd/sys/arm/ti/clk/
H A Dti_mux_clock.c63 struct clock_cell_info clock_cell; member
152 read_clock_cells(sc->sc_dev, &sc->clock_cell); in ti_mux_attach()
154 create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef); in ti_mux_attach()
158 sc->mux_def.width = fls(sc->clock_cell.num_real_clocks-1); in ti_mux_attach()
160 sc->mux_def.width = fls(sc->clock_cell.num_real_clocks); in ti_mux_attach()
163 sc->clock_cell.num_real_clocks, sc->mux_def.width); in ti_mux_attach()
165 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef); in ti_mux_attach()
203 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->mux_def.clkdef); in ti_mux_new_pass()
H A Dti_gate_clock.c64 struct clock_cell_info clock_cell; member
174 read_clock_cells(sc->sc_dev, &sc->clock_cell); in ti_gate_attach()
176 create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->gate_def.clkdef); in ti_gate_attach()
179 sc->gate_def.mask = (1 << fls(sc->clock_cell.num_real_clocks)) - 1; in ti_gate_attach()
181 sc->clock_cell.num_real_clocks, sc->gate_def.mask); in ti_gate_attach()
183 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->gate_def.clkdef); in ti_gate_attach()
226 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->gate_def.clkdef); in ti_gate_new_pass()
H A Dti_divider_clock.c61 struct clock_cell_info clock_cell; member
176 read_clock_cells(sc->sc_dev, &sc->clock_cell); in ti_divider_attach()
178 create_clkdef(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef); in ti_divider_attach()
180 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef); in ti_divider_attach()
224 err = find_parent_clock_names(sc->sc_dev, &sc->clock_cell, &sc->div_def.clkdef); in ti_divider_new_pass()
H A Dti_dpll_clock.c64 struct clock_cell_info clock_cell; member
285 read_clock_cells(sc->dev, &sc->clock_cell); in ti_dpll_attach()
287 create_clkdef(sc->dev, &sc->clock_cell, &sc->dpll_def.clkdef); in ti_dpll_attach()
289 err = find_parent_clock_names(sc->dev, &sc->clock_cell, in ti_dpll_attach()
334 err = find_parent_clock_names(sc->dev, &sc->clock_cell, in ti_dpll_new_pass()