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Searched refs:cf1 (Results 1 – 15 of 15) sorted by relevance

/freebsd/contrib/wpa/src/ap/
H A Ddfs.h16 int cf1, int cf2);
19 int cf1, int cf2);
23 int cf1, int cf2);
26 int chan_offset, int chan_width, int cf1, int cf2);
31 int cf1, int cf2);
H A Ddfs.c629 u8 cf1 = 0, cf2 = 0; in dfs_set_valid_channel() local
632 channel = dfs_get_valid_channel(iface, &sec, &cf1, &cf2, in dfs_set_valid_channel()
643 hostapd_set_oper_centr_freq_seg0_idx(iface->conf, cf1); in dfs_set_valid_channel()
677 int chan_offset, int chan_width, int cf1, in set_dfs_state() argument
701 frequency = cf1; in set_dfs_state()
705 frequency = cf1 - 10; in set_dfs_state()
709 frequency = cf1 - 30; in set_dfs_state()
713 frequency = cf1 - 30; in set_dfs_state()
718 frequency = cf1 - 70; in set_dfs_state()
743 int chan_width, int cf1, int cf2) in dfs_are_channels_overlapped() argument
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H A Dinterference.c350 int chan_width, int cf1, int cf2, in hostapd_incumbt_sig_intf_detected() argument
370 int start_freq = (cf1 - channel_width_to_int(chan_width) / 2) + 10; in hostapd_incumbt_sig_intf_detected()
377 freq, chan_width, cf1, cf2, chan_bw_interference_bitmap); in hostapd_incumbt_sig_intf_detected()
409 (cf1 - channel_width_to_int(chan_width) / 2) + 10; in hostapd_incumbt_sig_intf_detected()
H A Ddrv_callbacks.c1256 int offset, int width, int cf1, int cf2, in hostapd_event_ch_switch() argument
1272 width, channel_width_to_string(width), cf1, cf2, in hostapd_event_ch_switch()
1323 if (cf1 == 5935) in hostapd_event_ch_switch()
1324 seg0_idx = (cf1 - 5925) / 5; in hostapd_event_ch_switch()
1325 else if (cf1 > 5950) in hostapd_event_ch_switch()
1326 seg0_idx = (cf1 - 5950) / 5; in hostapd_event_ch_switch()
1327 else if (cf1 > 5000) in hostapd_event_ch_switch()
1328 seg0_idx = (cf1 - 5000) / 5; in hostapd_event_ch_switch()
1338 ieee80211_freq_to_chan(cf1, &seg0_idx); in hostapd_event_ch_switch()
1426 cf1, cf2, is_dfs0, is_dfs, punct_bitmap); in hostapd_event_ch_switch()
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H A Dinterference.h15 int cf1, int cf2,
H A Dhostapd.h908 int offset, int width, int cf1, int cf2,
/freebsd/contrib/wpa/src/drivers/
H A Ddriver_nl80211_event.c1237 static int calculate_chan_offset(int width, int freq, int cf1, int cf2) in calculate_chan_offset() argument
1246 freq1 = cf1 - 10; in calculate_chan_offset()
1249 freq1 = cf1 - 30; in calculate_chan_offset()
1252 freq1 = cf1 - 70; in calculate_chan_offset()
1255 freq1 = cf1 - 30; in calculate_chan_offset()
1258 freq1 = cf1 - 150; in calculate_chan_offset()
1276 struct nlattr *bw, struct nlattr *cf1, in mlme_event_ch_switch() argument
1318 } else if (bw && cf1) { in mlme_event_ch_switch()
1322 nla_get_u32(cf1), in mlme_event_ch_switch()
1340 if (cf1) in mlme_event_ch_switch()
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H A Ddriver.h7445 int cf1; member
7474 int cf1; member
7704 int cf1; member
/freebsd/contrib/wpa/wpa_supplicant/
H A Dap.h76 int offset, int width, int cf1, int cf2,
H A Dap.c1899 int offset, int width, int cf1, int cf2, in wpas_ap_ch_switch() argument
1912 offset, width, cf1, cf2, punct_bitmap, in wpas_ap_ch_switch()
2145 radar->cf1, radar->cf2); in wpas_ap_event_dfs_radar_detected()
2161 radar->chan_width, radar->cf1, radar->cf2); in wpas_ap_event_dfs_cac_started()
2177 radar->chan_width, radar->cf1, radar->cf2); in wpas_ap_event_dfs_cac_finished()
2193 radar->chan_width, radar->cf1, radar->cf2); in wpas_ap_event_dfs_cac_aborted()
2209 radar->chan_width, radar->cf1, radar->cf2); in wpas_ap_event_dfs_cac_nop_finished()
H A Dnan_supplicant.c113 u8 channel, int bw, u8 op_class, u8 *cf1) in wpas_nan_valid_chan() argument
150 *cf1 = center; in wpas_nan_valid_chan()
H A Devents.c7152 data->ch_switch.cf1, in wpa_supplicant_event()
7182 data->ch_switch.cf1, in wpa_supplicant_event()
7220 data->ch_switch.cf1, in wpa_supplicant_event()
/freebsd/contrib/wpa/hostapd/
H A Dctrl_iface.c1585 data.dfs_event.cf1 = atoi(pos + 4); in hostapd_ctrl_iface_radar()
/freebsd/share/misc/
H A Dusb_vendors14759 0cf1 e-Conn Electronic Co., Ltd
20559 1cf1 Dresden Elektronik
21910 0cf1 duraSign Pad Biometric 5.0
22424 0cf1 Pad Biometric US 5.0
H A Dpci_vendors36302 2cf1 Xeon C5500/C3500 Integrated Memory Controller Channel 2 Address