Searched refs:canCombine (Results 1 – 3 of 3) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 5923 static bool canCombine(MachineBasicBlock &MBB, MachineOperand &MO, in canCombine() function
5958 return canCombine(MBB, MO, MulOpc, ZeroReg, true); in canCombineWithMUL()
5965 return canCombine(MBB, MO, MulOpc); in canCombineWithFMUL()
6108 if (canCombine(MBB, Root.getOperand(Operand), Opcode)) { in getMaddPatterns()
6586 if (canCombine(MBB, Root.getOperand(2), AArch64::ADDWrr) || in getMiscPatterns()
6587 canCombine(MBB, Root.getOperand(2), AArch64::ADDSWrr) || in getMiscPatterns()
6588 canCombine(MBB, Root.getOperand(2), AArch64::ADDXrr) || in getMiscPatterns()
6589 canCombine(MBB, Root.getOperand(2), AArch64::ADDSXrr)) { in getMiscPatterns()
|
| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfo.cpp | 2078 static const MachineInstr *canCombine(const MachineBasicBlock &MBB, in canCombine() function
2102 const MachineInstr *ShiftMI = canCombine(MBB, MO, RISCV::SLLI); in canCombineShiftIntoShXAdd()
2138 const MachineInstr *AddMI = canCombine(MBB, Root.getOperand(2), RISCV::ADD); in getSHXADDPatterns()
|
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | CodeGenPrepare.cpp | 7800 bool canCombine(const Instruction *Use) { return isa<StoreInst>(Use); } in canCombine() function in __anon1d600f581911::VectorPromoteHelper
7809 assert(canCombine(ToBeCombined) && "Unsupported instruction to combine"); in recordCombineInstruction()
7913 if (VPH.canCombine(ToBePromoted)) { in optimizeExtractElementInst()
|