| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPULegalizerInfo.cpp | 2400 B.buildSelect(Dst, CmpRes, PtrLo32, SegmentNull.getReg(0)); in legalizeAddrSpaceCast() 2439 B.buildSelect(Dst, CmpRes, BuildPtr, FlatNull); in legalizeAddrSpaceCast() 2492 B.buildSelect(MI.getOperand(0).getReg(), Cond, Src, Tmp2); in legalizeFroundeven() 2518 auto Add = B.buildSelect(S64, And, One, Zero); in legalizeFceil() 2599 auto Tmp1 = B.buildSelect(S64, ExpLt0, SignBit64, Tmp0); in legalizeIntrinsicTrunc() 2600 B.buildSelect(MI.getOperand(0).getReg(), ExpGt51, Src, Tmp1); in legalizeIntrinsicTrunc() 3337 B.buildSelect(F32, IsLtSmallestNormal, Scale32, One, Flags); in getScaledLogInput() 3386 B.buildSelect(Ty, IsLtSmallestNormal, ThirtyTwo, Zero, Flags); in legalizeFlog2() 3490 R = B.buildSelect(Ty, IsFinite, R, Y, Flags).getReg(0); in legalizeFlogCommon() 3497 auto Shift = B.buildSelect(Ty, IsScaled, ShiftK, Zero, Flags); in legalizeFlogCommon() [all …]
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| H A D | AMDGPURegBankLegalizeHelper.cpp | 145 B.buildSelect(Dst, Src, True, False); in lowerVccExtToSel() 149 auto Lo = B.buildSelect({VgprRB_S32}, Src, True, False); in lowerVccExtToSel() 353 B.buildSelect({VgprRB, Ty}, Cond, Op2.getReg(0), Op3.getReg(0), Flags); in lowerSplitTo32Select() 355 B.buildSelect({VgprRB, Ty}, Cond, Op2.getReg(1), Op3.getReg(1), Flags); in lowerSplitTo32Select() 405 B.buildSelect(MI.getOperand(0).getReg(), MI.getOperand(1).getReg(), True, in lower()
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| H A D | AMDGPUCombinerHelper.cpp | 502 auto NewSel = Builder.buildSelect( in matchCombineFmulWithSelectToFldexp()
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| H A D | AMDGPURegisterBankInfo.cpp | 144 B.buildSelect(DstReg, SrcReg, True, False); in applyBank() 2009 auto S = B.buildSelect(EltTy, Cmp, in foldExtractEltToCmpSelect() 2114 Register Select = B.buildSelect(EltTy, Cmp, Op0, Op1).getReg(0); in foldInsertEltToCmpSelect() 2385 B.buildSelect(DefRegs[0], CondRegs[0], Src1Regs[0], Src2Regs[0], Flags); in applyMappingImpl() 2386 B.buildSelect(DefRegs[1], CondRegs[0], Src1Regs[1], Src2Regs[1], Flags); in applyMappingImpl() 2824 B.buildSelect(DefRegs[0], SrcReg, True, False); in applyMappingImpl() 2827 auto Sel = B.buildSelect(SelType, SrcReg, True, False); in applyMappingImpl() 2831 B.buildSelect(DstReg, SrcReg, True, False); in applyMappingImpl()
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| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| H A D | LegalizerHelper.cpp | 1865 MIRBuilder.buildSelect(CmpOut, CmpEq, CmpIn, Cmp); in narrowScalar() 1892 MIRBuilder.buildSelect(CmpOut, CmpEq, CmpIn, Cmp); in narrowScalar() 6030 auto Lo = MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL); in narrowScalarShift() 6031 auto Hi = MIRBuilder.buildSelect( in narrowScalarShift() 6032 HalfTy, IsZero, InH, MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL)); in narrowScalarShift() 6058 auto Lo = MIRBuilder.buildSelect( in narrowScalarShift() 6059 HalfTy, IsZero, InL, MIRBuilder.buildSelect(HalfTy, IsShort, LoS, LoL)); in narrowScalarShift() 6061 auto Hi = MIRBuilder.buildSelect(HalfTy, IsShort, HiS, HiL); in narrowScalarShift() 6955 auto Select = MIRBuilder.buildSelect(NarrowTy, in narrowScalarSelect() 6961 auto Select = MIRBuilder.buildSelect( in narrowScalarSelect() [all …]
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| H A D | CombinerHelperCasts.cpp | 226 B.buildSelect(Dst, Cond, True, False); in matchCastOfSelect()
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| H A D | MachineIRBuilder.cpp | 952 MachineIRBuilder::buildSelect(const DstOp &Res, const SrcOp &Tst, in buildSelect() function in MachineIRBuilder
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| H A D | CombinerHelper.cpp | 3822 Builder.buildSelect(Dst, SelectCond, FoldTrue, FoldFalse, MI.getFlags()); in applyFoldBinOpIntoSelect() 5462 auto ret = MIB.buildSelect(Ty, IsOne, LHS, Q); in buildUDivorURemUsingMul() 5774 AShr = Builder.buildSelect(Ty, IsOneOrMinusOne, LHS, AShr); in applySDivByPow2() 5780 Builder.buildSelect(MI.getOperand(0).getReg(), IsNeg, Neg, AShr); in applySDivByPow2()
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| H A D | IRTranslator.cpp | 1534 MIRBuilder.buildSelect(ResRegs[i], Tst, Op0Regs[i], Op1Regs[i], Flags); in translateSelect()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/SPIRV/ |
| H A D | SPIRVBuiltins.cpp | 484 return MIRBuilder.buildSelect(ReturnRegister, SourceRegister, TrueConst, in buildSelectInst() 1572 MIRBuilder.buildSelect(SelectionResult, CompareRegister, Extracted, in genWorkgroupQuery() 2170 MIRBuilder.buildSelect(Call->ReturnRegister, Call->Arguments[0], in generateSelectInst()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/GlobalISel/ |
| H A D | MachineIRBuilder.h | 1392 MachineInstrBuilder buildSelect(const DstOp &Res, const SrcOp &Tst,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/GISel/ |
| H A D | RISCVLegalizerInfo.cpp | 903 MIB.buildSelect(Dst, Src, SplatTrue, SplatZero); in legalizeExt()
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