Searched refs:buildRegSequence (Results 1 – 2 of 2) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/ |
| H A D | AMDGPUISelDAGToDAG.cpp | 3174 static MachineSDNode *buildRegSequence(SmallVectorImpl<SDValue> &Elts, in buildRegSequence() function
3199 Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0); in selectWMMAModsNegAbs()
3203 Src = SDValue(buildRegSequence(NegAbsElts, CurDAG, DL, ElementSize), 0); in selectWMMAModsNegAbs()
3209 Src = SDValue(buildRegSequence(Elts, CurDAG, DL, ElementSize), 0); in selectWMMAModsNegAbs()
|
| H A D | AMDGPUInstructionSelector.cpp | 3903 static Register buildRegSequence(SmallVectorImpl<Register> &Elts, in buildRegSequence() function
3947 Src = buildRegSequence(Elts, InsertPt, MRI); in selectWMMAModsNegAbs()
3951 Src = buildRegSequence(NegAbsElts, InsertPt, MRI); in selectWMMAModsNegAbs()
3957 Src = buildRegSequence(Elts, InsertPt, MRI); in selectWMMAModsNegAbs()
4010 Src = buildRegSequence(EltsV2F16, Root.getParent(), *MRI); in selectWMMAModsF16Neg()
|