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Searched refs:bitsGT (Results 1 – 24 of 24) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h279 bool bitsGT(EVT VT) const { in bitsGT() function
/freebsd/contrib/llvm-project/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.cpp107 if (Src.getValueType().bitsGT(MVT::i32)) in EmitSpecializedLibcall()
H A DARMISelLowering.cpp12883 unsigned ExtOp = VT.bitsGT(tmp.getValueType()) ? ISD::ANY_EXTEND : ISD::TRUNCATE; in AddCombineBUILD_VECTORToVPADDL()
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DMachineValueType.h406 bool bitsGT(MVT VT) const { in bitsGT() function
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp394 } else if (IdxVT.bitsGT(PtrVT)) { in getRegForGEPIndex()
1854 if (DstVT.bitsGT(SrcVT)) in selectOperator()
H A DSelectionDAG.cpp1471 return VT.bitsGT(Op.getValueType()) in getFPExtendOrRound()
1483 VT.bitsGT(Op.getValueType()) in getStrictFPExtendOrRound()
1492 return VT.bitsGT(Op.getValueType()) ? in getAnyExtOrTrunc()
1498 return VT.bitsGT(Op.getValueType()) ? in getSExtOrTrunc()
1504 return VT.bitsGT(Op.getValueType()) ? in getZExtOrTrunc()
1639 if (VT.bitsGT(Op.getValueType())) in getVPZExtOrTrunc()
6261 if (SVT.bitsGT(VT.getScalarType())) { in foldCONCAT_VECTORS()
6510 assert(N1.getValueType().bitsGT(VT) && "Invalid truncate node, src < dst!"); in getNode()
6523 if (N1.getOperand(0).getValueType().bitsGT(VT)) in getNode()
7172 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT)) { in FoldConstantArithmetic()
[all …]
H A DTargetLowering.cpp241 if (VT.bitsGT(LVT)) in findOptimalMemOpLowering()
5083 if (Op0.getValueType().bitsGT(VT)) in SimplifySetCC()
12318 ResultVT.bitsGT(VecEltVT) ? ISD::EXTLOAD : ISD::NON_EXTLOAD; in scalarizeExtractedVectorLoad()
12353 if (ResultVT.bitsGT(VecEltVT)) { in scalarizeExtractedVectorLoad()
H A DLegalizeDAG.cpp1850 if ((SrcVT.bitsGT(SlotVT) && in EmitStackConvert()
1870 if (SrcVT.bitsGT(SlotVT)) in EmitStackConvert()
H A DDAGCombiner.cpp6826 if (!LoadedVT.bitsGT(ExtVT) || !ExtVT.isRound()) in isAndLoadExtLoad()
11440 EVT MaxVT = VT0.bitsGT(VT1) ? VT0 : VT1; in foldABSToABD()
15982 if (N0.getOperand(0).getValueType().bitsGT(VT)) in visitTRUNCATE()
23613 if (InOp.getValueType().bitsGT(ScalarVT)) in visitEXTRACT_VECTOR_ELT()
23823 if (!BCVT.isVector() || ExtVT.bitsGT(BCVT.getVectorElementType())) in visitEXTRACT_VECTOR_ELT()
28598 if (XType.bitsGT(AType)) { in foldSelectCCToShiftAnd()
28618 if (XType.bitsGT(AType)) { in foldSelectCCToShiftAnd()
H A DLegalizeVectorTypes.cpp2010 if (EltVT.bitsGT(Elt.getValueType())) in SplitVecRes_INSERT_VECTOR_ELT()
2795 if (Ops[I].getValueType().bitsGT(EltVT)) in SplitVecRes_VECTOR_SHUFFLE()
H A DSelectionDAGBuilder.cpp794 if (BuiltVectorTy.getVectorElementType().bitsGT( in getCopyToPartsVector()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1559 return VT.bitsGT(MVT::i32) && Alignment >= Align(4); in allowsMisalignedMemoryAccesses()
1806 InVal = OpVT.bitsGT(InVal.getValueType()) ? in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp5160 ContainerVT.bitsGT(RISCVTargetLowering::getM1VT(ContainerVT)) && in lowerVZIP()
5742 if (SVT.isInteger() && SVT.bitsGT(XLenVT)) { in lowerVECTOR_SHUFFLE()
6162 if (IndexVT.getScalarType().bitsGT(XLenVT)) { in lowerVECTOR_SHUFFLE()
6170 if (IndexVT.getScalarType().bitsGT(MVT::i16) && isUInt<16>(NumElts - 1) && in lowerVECTOR_SHUFFLE()
6401 if (FloatVT.bitsGT(VT)) { in lowerCTLZ_CTTZ_ZERO_UNDEF()
6439 else if (IntVT.bitsGT(VT)) in lowerCTLZ_CTTZ_ZERO_UNDEF()
9919 if (!SmallerVT.isValid() || !VecVT.bitsGT(SmallerVT)) in getSmallestVTForIndex()
9990 if (auto VLEN = Subtarget.getRealVLen(); VLEN && ContainerVT.bitsGT(M1VT)) { in lowerINSERT_VECTOR_ELT()
10267 if (ContainerVT.bitsGT(LMUL2VT) && VecVT.isFixedLengthVector()) in lowerEXTRACT_VECTOR_ELT()
11576 if (ContainerVecVT.bitsGT(RISCVTargetLowering::getM1VT(ContainerVecVT))) { in lowerINSERT_SUBVECTOR()
[all …]
H A DRISCVTargetTransformInfo.cpp404 if (IndexVT.getScalarType().bitsGT(ST.getXLenVT())) in getVRGatherIndexType()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp3514 if (Elem0.getValueType().bitsGT(TruncTy)) in PerformDAGCombine()
3555 if (ty(Elem0).bitsGT(TruncTy)) in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86FastISel.cpp3723 if (DstVT.bitsGT(SrcVT)) in fastSelectInstruction()
H A DX86ISelLowering.cpp22638 if (Sign.getSimpleValueType().bitsGT(VT)) in LowerFCOPYSIGN()
24832 if (CmpVT.bitsGT(SplatVT)) in LowerSELECTWithCmpZero()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64FastISel.cpp4970 } else if (IdxVT.bitsGT(PtrVT)) in getRegForGEPIndex()
H A DAArch64TargetTransformInfo.cpp3560 EVT WiderTy = SrcTy.bitsGT(DstTy) ? SrcTy : DstTy; in getCastInstrCost()
H A DAArch64ISelLowering.cpp5589 Op.getOperand(1).getValueType().bitsGT(VT)) in getSVEPredicateBitCast()
5598 if (InVT.bitsGT(VT)) in getSVEPredicateBitCast()
19153 if (DestTy.bitsGT(SrcTy)) { in tryToReplaceScalarFPConversionWithSVE()
29829 if (VT.bitsGT(SrcVT)) { in LowerFixedLengthFPToIntToSVE()
/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp1460 if (ExpectedVT.bitsGT(ActualVT)) in correctParamType()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DCodeGenPrepare.cpp7331 if (!LoadResultVT.bitsGT(TruncVT) || !TruncVT.isRound() || in optimizeLoadExt()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp16784 if (Op1VT.bitsGT(mVT)) { in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/
H A DDemangleTestCases.inc13285 {"_ZNK4llvm3EVT6bitsGTES0_", "llvm::EVT::bitsGT(llvm::EVT) const"},