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Searched refs:bitsGE (Results 1 – 16 of 16) sorted by relevance

/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DValueTypes.h287 bool bitsGE(EVT VT) const { in bitsGE() function
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGenTypes/
H A DMachineValueType.h413 bool bitsGE(MVT VT) const { in bitsGE() function
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1193 if (Ptr->getOpcode() != AMDGPUISD::DWORDADDR && VT.bitsGE(MVT::i32)) { in LowerSTORE()
H A DAMDGPUISelLowering.cpp3989 if (SrcVT.bitsGE(ExtVT)) { in performAssertSZExtCombine()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp403 (EltVT.isInteger() && Val.getValueType().bitsGE(EltVT))) { in ExpandINSERT_VECTOR_ELT()
5036 if (NVT.bitsGE(SVT)) in ConvertNodeToLibcall()
5078 if (NVT.bitsGE(RVT)) in ConvertNodeToLibcall()
H A DLegalizeFloatTypes.cpp1092 if (NVT.bitsGE(SVT)) in SoftenFloatRes_XINT_TO_FP()
1272 if (Promoted.bitsGE(RetVT)) in findFPToIntLibcall()
H A DLegalizeIntegerTypes.cpp843 if (SVT.bitsGE(NVT)) { in PromoteIntRes_EXTRACT_VECTOR_ELT()
2792 if (ResVT.bitsGE(EltVT)) in PromoteIntOp_VECREDUCE()
2821 if (VT.bitsGE(EltVT)) in PromoteIntOp_VP_REDUCE()
H A DSelectionDAGBuilder.cpp706 PartEVT.getVectorElementType().bitsGE( in getCopyToPartsVector()
8639 assert(EVLParamVT.isScalarInteger() && EVLParamVT.bitsGE(MVT::i32) && in visitVPCmp()
8667 assert(EVLParamVT.isScalarInteger() && EVLParamVT.bitsGE(MVT::i32) && in visitVectorPredicationIntrinsic()
H A DSelectionDAG.cpp8506 assert(NVT.bitsGE(VT)); in getMemcpyLoadsAndStores()
12585 assert(CVT.bitsGE(VecEltVT) && "Illegal splat_vector element extension"); in isConstOrConstSplat()
12601 assert(CVT.bitsGE(NSVT) && "Illegal build vector element extension"); in isConstOrConstSplat()
H A DDAGCombiner.cpp6959 ExtVT.bitsGE(Load->getMemoryVT())) in SearchForAndLoads()
6980 if (ExtVT.bitsGE(VT)) in SearchForAndLoads()
23216 MaxEltVT = MaxEltVT.bitsGE(EltVT) ? MaxEltVT : EltVT; in visitINSERT_VECTOR_ELT()
28568 if (!isNullConstant(N3) || !XType.bitsGE(AType)) in foldSelectCCToShiftAnd()
H A DLegalizeVectorTypes.cpp3902 assert(N->getValueType(0).bitsGE(EltVT) && "Illegal EXTRACT_VECTOR_ELT."); in SplitVecOp_EXTRACT_VECTOR_ELT()
/freebsd/contrib/llvm-project/llvm/lib/Target/WebAssembly/
H A DWebAssemblyISelLowering.cpp2775 if (LaneT.bitsGE(MVT::i32)) in unrollVectorShift()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp7861 ContainerVT.bitsGE(RISCVTargetLowering::getM1VT(ContainerVT))) { in LowerOperation()
16445 if (Opc == RISCVISD::FMV_X_ANYEXTH && SrcVT.bitsGE(MVT::i16) && in performSIGN_EXTEND_INREGCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp29488 if (VT.bitsGE(MVT::i32)) { in LowerABD()
52095 if (!N->hasOneUse() || !N->getSimpleValueType(0).bitsGE(MVT::i32) || in combineOrCmpEqZeroToCtlzSrl()
52105 N->getOperand(1).getValueType().bitsGE(MVT::i32); in combineOrCmpEqZeroToCtlzSrl()
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp29546 if (VT.bitsGE(SrcVT)) { in LowerFixedLengthIntToFPToSVE()
/freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/
H A DDemangleTestCases.inc14448 {"_ZNK4llvm3EVT6bitsGEES0_", "llvm::EVT::bitsGE(llvm::EVT) const"},