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Searched refs:b16 (Results 1 – 14 of 14) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/Target/NVPTX/
H A DNVPTXIntrinsics.td2333 : VLDU_G_ELE_V4<"v4.b16 \t{{$dst1, $dst2, $dst3, $dst4}}, [$src];",
2500 "mov.b16 \t$r, $s;",
3970 defm SULD_1D_I16_CLAMP : SULD_1D<"suld.b.1d.b16.clamp", Int16Regs>;
3975 defm SULD_1D_I16_TRAP : SULD_1D<"suld.b.1d.b16.trap", Int16Regs>;
3980 defm SULD_1D_I16_ZERO : SULD_1D<"suld.b.1d.b16.zero", Int16Regs>;
3997 : SULD_1D_ARRAY<"suld.b.a1d.b16.clamp", Int16Regs>;
4006 : SULD_1D_ARRAY<"suld.b.a1d.b16.trap", Int16Regs>;
4015 : SULD_1D_ARRAY<"suld.b.a1d.b16.zero", Int16Regs>;
4032 defm SULD_2D_I16_CLAMP : SULD_2D<"suld.b.2d.b16.clamp", Int16Regs>;
4037 defm SULD_2D_I16_TRAP : SULD_2D<"suld.b.2d.b16.trap", Int16Regs>;
[all …]
H A DNVPTXInstrInfo.td781 defm SELP_b16 : SELP_PATTERN<"b16", i16, Int16Regs, i16imm, imm>;
790 defm SELP_f16 : SELP_PATTERN<"b16", f16, Int16Regs, f16imm, fpimm>;
791 defm SELP_bf16 : SELP_PATTERN<"b16", bf16, Int16Regs, bf16imm, fpimm>;
1170 // the constant into a register using mov.b16.
1173 "mov.b16 \t$dst, $a;", []>;
1176 "mov.b16 \t$dst, $a;", []>;
1522 // Template for three-arg bitwise operations. Takes three args, Creates .b16,
1535 !strconcat(OpcStr, ".b16 \t$dst, $a, $b;"),
1539 !strconcat(OpcStr, ".b16 \t$dst, $a, $b;"),
1596 "not.b16 \t$dst, $src;",
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/freebsd/sys/dev/sound/pci/
H A Demu10k1.c179 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1; member
583 m->b16 = 0; in emu_vinit()
605 s->b16 = 0; in emu_vinit()
624 v->b16 = (ch->fmt & AFMT_16BIT) ? 1 : 0; in emu_vsetup()
627 v->slave->b16 = v->b16; in emu_vsetup()
645 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); in emu_vwrite()
658 val *= v->b16 ? 1 : 2; in emu_vwrite()
672 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); in emu_vwrite()
715 ccis *= v->b16 ? 1 : 2; in emu_vtrigger()
716 sample = v->b16 ? 0x00000000 : 0x80808080; in emu_vtrigger()
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H A Demu10kx.c255 unsigned int b16:1, stereo:1, busy:1, running:1, ismaster:1; member
1307 m->b16 = 0; in emu_vinit()
1319 s->b16 = 0; in emu_vinit()
1335 v->b16 = (fmt & AFMT_16BIT) ? 1 : 0; in emu_vsetup()
1338 v->slave->b16 = v->b16; in emu_vsetup()
1374 s = (v->stereo ? 1 : 0) + (v->b16 ? 1 : 0); in emu_vwrite()
1385 val *= v->b16 ? 1 : 2; in emu_vwrite()
1411 emu_wrptr(sc, v->vnum, EMU_CHAN_CCCA, start | (v->b16 ? 0 : EMU_CHAN_CCCA_8BITSELECT)); in emu_vwrite()
1462 ccis *= v->b16 ? 1 : 2; in emu_vtrigger()
1463 sample = v->b16 ? 0x00000000 : 0x80808080; in emu_vtrigger()
[all …]
H A Dsolo.c418 int b16 = (fmt & AFMT_16BIT)? 1 : 0; in ess_setupch() local
456 (b16? 0x04 : 0x00) | in ess_setupch()
472 fmtval = b16 | (stereo << 1) | ((!unsign) << 2); in ess_setupch()
/freebsd/contrib/file/magic/Magdir/
H A Djpeg224 >>>101 beshort&0xf 0x2 \b16
225 >>>101 beshort&0xf 0x3 \b16-SIGNED
226 >>>101 beshort&0xf 0x4 \b16-FLOAT
H A Dimages2592 # Extension: .b16
2819 >>101 ubeshort&0xf 0x2 \b16
2820 >>101 ubeshort&0xf 0x3 \b16-SIGNED
2821 >>101 ubeshort&0xf 0x4 \b16-FLOAT
/freebsd/contrib/llvm-project/llvm/lib/Target/ARC/
H A DARCInstrFormats.td155 class F32_BR<bits<5> major, dag outs, dag ins, bit b16, string asmstr,
161 let Inst{16} = b16;
165 class F32_BR_COND<bits<5> major, dag outs, dag ins, bit b16, string asmstr,
167 F32_BR<major, outs, ins, b16, asmstr, pattern> {
175 class F32_BR_UCOND_FAR<bits<5> major, dag outs, dag ins, bit b16, string asmstr,
177 F32_BR<major, outs, ins, b16, asmstr, pattern> {
/freebsd/contrib/llvm-project/llvm/include/llvm/IR/
H A DIntrinsicsNVVM.td191 // ldmatrix b16 -> s32 @ m8n8
192 !eq(gft,"m8n8:x1:b16") : !listsplat(llvm_i32_ty, 1),
193 !eq(gft,"m8n8:x2:b16") : !listsplat(llvm_i32_ty, 2),
194 !eq(gft,"m8n8:x4:b16") : !listsplat(llvm_i32_ty, 4),
398 ["m8n8"], ["x1", "x2", "x4"], ["b16"]>.ret;
529 // Only currently support m8n8 and b16
530 !and(!eq(g, "m8n8"), !eq(t, "b16")): true,
/freebsd/contrib/llvm-project/llvm/lib/Target/Mips/
H A DMicroMipsInstrInfo.td688 def B16_MM : UncondBranchMM16<"b16">, B16_FM, ISA_MICROMIPS32_NOT_MIPS32R6;
H A DMicroMips32r6InstrInfo.td1730 def : MipsInstAlias<"b16 $offset", (BC16_MMR6 brtarget10_mm:$offset), 0>,
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.td295 def B16 : AArch64Reg<16, "b16">, DwarfRegNum<[80]>;
/freebsd/share/misc/
H A Dpci_vendors11992 103c 2b16 GeForce GT 745A
30557 108e 7b16 Quad Port GbE PCIe 2.0 ExpressModule, UTP
34279 2b16 Xeon Processor E7 Product Family Memory Controller 0b
35276 3b16 3450 Chipset LPC Interface Controller
H A Dusb_vendors12371 0b16 Toshiba StorE HDD