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Searched refs:agaw (Results 1 – 6 of 6) sorted by relevance

/freebsd/sys/x86/iommu/
H A Dintel_utils.c88 int agaw; member
93 {.agaw = 30, .cap = DMAR_CAP_SAGAW_2LVL, .awlvl = DMAR_CTX2_AW_2LVL,
95 {.agaw = 39, .cap = DMAR_CAP_SAGAW_3LVL, .awlvl = DMAR_CTX2_AW_3LVL,
97 {.agaw = 48, .cap = DMAR_CAP_SAGAW_4LVL, .awlvl = DMAR_CTX2_AW_4LVL,
99 {.agaw = 57, .cap = DMAR_CAP_SAGAW_5LVL, .awlvl = DMAR_CTX2_AW_5LVL,
132 if (sagaw_bits[i].agaw >= mgaw) { in domain_set_agaw()
133 domain->agaw = sagaw_bits[i].agaw; in domain_set_agaw()
158 if ((1ULL << sagaw_bits[i].agaw) >= maxaddr && in dmar_maxaddr2mgaw()
169 return (sagaw_bits[i].agaw); in dmar_maxaddr2mgaw()
H A Dintel_idpgtbl.c502 KASSERT(base < (1ULL << domain->agaw), in dmar_map_buf()
504 (uintmax_t)size, domain->agaw)); in dmar_map_buf()
505 KASSERT(base + size < (1ULL << domain->agaw), in dmar_map_buf()
507 (uintmax_t)size, domain->agaw)); in dmar_map_buf()
613 KASSERT(base < (1ULL << domain->agaw), in dmar_unmap_buf_locked()
615 (uintmax_t)size, domain->agaw)); in dmar_unmap_buf_locked()
616 KASSERT(base + size < (1ULL << domain->agaw), in dmar_unmap_buf_locked()
618 (uintmax_t)size, domain->agaw)); in dmar_unmap_buf_locked()
H A Dintel_ctx.c395 domain->iodom.end = 1ULL << (domain->agaw - 1); in dmar_domain_alloc()
586 domain->agaw, id_mapped ? "id" : "re"); in dmar_get_ctx_for_dev1()
H A Dintel_dmar.h60 int agaw; /* (c) Adjusted guest address width */ member
H A Dintel_drv.c1114 domain, domain->domain, domain->mgaw, domain->agaw, domain->pglvl, in dmar_print_domain()
/freebsd/sys/amd64/vmm/intel/
H A Dvtd.c638 int tmp, i, gaw, agaw, sagaw, res, pt_levels, addrwidth; in vtd_create_domain() local
654 agaw = gaw; in vtd_create_domain()
656 agaw = gaw + 9 - res; in vtd_create_domain()
658 if (agaw > 64) in vtd_create_domain()
659 agaw = 64; in vtd_create_domain()
677 if ((tmp & (1 << i)) != 0 && sagaw >= agaw) in vtd_create_domain()
688 tmp, agaw); in vtd_create_domain()