Searched refs:addRegisterDefined (Results 1 – 12 of 12) sorted by relevance
| /freebsd/contrib/llvm-project/llvm/lib/CodeGen/ |
| H A D | ExpandPostRAPseudos.cpp | 128 CopyMI->addRegisterDefined(DstReg); in LowerSubregToReg()
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| H A D | VirtRegMap.cpp | 751 MI.addRegisterDefined(SuperDefs.pop_back_val(), TRI); in rewrite()
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| H A D | MachineInstr.cpp | 2253 void MachineInstr::addRegisterDefined(Register Reg, in addRegisterDefined() function in MachineInstr
2292 addRegisterDefined(UsedReg, &TRI); in setPhysRegsDeadExcept()
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| H A D | RegAllocFast.cpp | 1278 MI.addRegisterDefined(PhysReg, TRI); in setPhysReg()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Lanai/ |
| H A D | LanaiInstrInfo.cpp | 431 MI->addRegisterDefined(Lanai::SR); in optimizeCompareInstr()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/ |
| H A D | SparcInstrInfo.cpp | 521 MovMI->addRegisterDefined(DestReg, TRI); in copyPhysReg()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/ |
| H A D | MachineInstr.h | 1722 LLVM_ABI void addRegisterDefined(Register Reg,
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| /freebsd/contrib/llvm-project/llvm/lib/Target/VE/ |
| H A D | VEInstrInfo.cpp | 353 MovMI->addRegisterDefined(DestReg, TRI); in copyPhysSubRegs()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInsertVSETVLI.cpp | 1782 MI.addRegisterDefined(RISCV::VL, MRI->getTargetRegisterInfo()); in insertReadVL()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/ |
| H A D | AArch64InstrInfo.cpp | 1629 Pred->addRegisterDefined(AArch64::NZCV, TRI); in optimizePTestInstr()
1959 MI->addRegisterDefined(AArch64::NZCV, &TRI); in substituteCmpToZero()
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMBaseInstrInfo.cpp | 880 Mov->addRegisterDefined(DestReg, TRI); in copyPhysReg()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/ |
| H A D | DemangleTestCases.inc | 17095 …RegisterDefinedEjPKNS_18TargetRegisterInfoE", "llvm::MachineInstr::addRegisterDefined(unsigned int…
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