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Searched refs:addPred (Results 1 – 12 of 12) sorted by relevance

/freebsd/contrib/llvm-project/llvm/lib/CodeGen/
H A DScheduleDAGInstrs.cpp307 UseSU->addPred(Dep); in addPhysRegDataDeps()
349 DefSU->addPred(Dep); in addPhysRegDeps()
480 UseSU->addPred(Dep); in addVRegDefDeps()
522 DefSU->addPred(Dep); in addVRegDefDeps()
567 V2SU.SU->addPred(SDep(SU, SDep::Anti, Reg)); in addVRegUseDeps()
577 SUb->addPred(Dep); in addChainDependency()
911 ExitSU.addPred(Dep); in buildSchedGraph()
1247 SuccSU->addPred(PredDep, /*Required=*/!PredDep.isArtificial()); in addEdge()
H A DMachinePipeliner.cpp1215 I.addPred(Dep); in updatePhiDependences()
1221 I.addPred(SDep(SU, SDep::Barrier)); in updatePhiDependences()
1237 I.addPred(Dep); in updatePhiDependences()
1243 I.addPred(SDep(SU, SDep::Barrier)); in updatePhiDependences()
1324 LastSU->addPred(Dep); in changeDependences()
2047 Src->addPred(SDep(I, SDep::Artificial)); in apply()
4308 To->addPred(Pred); in modifySUnits()
H A DScheduleDAG.cpp106 bool SUnit::addPred(const SDep &D, bool Required) { in addPred() function in SUnit
/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DScheduleDAG.h402 LLVM_ABI bool addPred(const SDep &D, bool Required = true);
411 return addPred(Dep); in addPredBarrier()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DSIMachineScheduler.h116 void addPred(SIScheduleBlock *Pred);
H A DSIMachineScheduler.cpp512 void SIScheduleBlock::addPred(SIScheduleBlock *Pred) { in addPred() function in SIScheduleBlock
1200 CurrentBlocks[SUID]->addPred(CurrentBlocks[Node2CurrentBlock[Pred->NodeNum]]); in createBlocksForVariant()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/ObjCARC/
H A DObjCARCOpts.cpp320 void addPred(BasicBlock *Pred) { Preds.push_back(Pred); } in addPred() function in __anon0b2926eb0111::BBState
1674 SuccStates.addPred(CurrBB); in ComputePostOrders()
1681 BBStates[SuccBB].addPred(CurrBB); in ComputePostOrders()
/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DScheduleDAGFast.cpp83 void AddPred(SUnit *SU, const SDep &D) { SU->addPred(D); } in AddPred()
H A DScheduleDAGSDNodes.cpp518 if (!SU.addPred(Dep) && !Dep.isCtrl() && OpSU->NumRegDefsLeft > 1) { in AddSchedEdges()
H A DScheduleDAGRRList.cpp226 SU->addPred(D); in AddPredQueued()
234 SU->addPred(D); in AddPred()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonSubtarget.cpp422 S1.addPred(A, true); in apply()
/freebsd/contrib/llvm-project/llvm/include/llvm/Testing/Demangle/
H A DDemangleTestCases.inc17640 {"_ZN4llvm5SUnit7addPredERKNS_4SDepE", "llvm::SUnit::addPred(llvm::SDep const&)"},