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/freebsd/contrib/llvm-project/compiler-rt/lib/tsan/rtl/
H A Dtsan_interface.h207 typedef unsigned short a16; typedef
237 a16 __tsan_atomic16_load(const volatile a16 *a, int mo);
250 void __tsan_atomic16_store(volatile a16 *a, a16 v, int mo);
263 a16 __tsan_atomic16_exchange(volatile a16 *a, a16 v, int mo);
276 a16 __tsan_atomic16_fetch_add(volatile a16 *a, a16 v, int mo);
289 a16 __tsan_atomic16_fetch_sub(volatile a16 *a, a16 v, int mo);
302 a16 __tsan_atomic16_fetch_and(volatile a16 *a, a16 v, int mo);
315 a16 __tsan_atomic16_fetch_or(volatile a16 *a, a16 v, int mo);
328 a16 __tsan_atomic16_fetch_xor(volatile a16 *a, a16 v, int mo);
341 a16 __tsan_atomic16_fetch_nand(volatile a16 *a, a16 v, int mo);
[all …]
H A Dtsan_interface_atomic.cpp193 static atomic_uint16_t *to_atomic(const volatile a16 *a) { in to_atomic()
194 return reinterpret_cast<atomic_uint16_t *>(const_cast<a16 *>(a)); in to_atomic()
539 a16 __tsan_atomic16_load(const volatile a16 *a, int mo) { in __tsan_atomic16_load()
566 void __tsan_atomic16_store(volatile a16 *a, a16 v, int mo) { in __tsan_atomic16_store()
593 a16 __tsan_atomic16_exchange(volatile a16 *a, a16 v, int mo) { in __tsan_atomic16_exchange()
620 a16 __tsan_atomic16_fetch_add(volatile a16 *a, a16 v, int mo) { in __tsan_atomic16_fetch_add()
647 a16 __tsan_atomic16_fetch_sub(volatile a16 *a, a16 v, int mo) { in __tsan_atomic16_fetch_sub()
674 a16 __tsan_atomic16_fetch_and(volatile a16 *a, a16 v, int mo) { in __tsan_atomic16_fetch_and()
701 a16 __tsan_atomic16_fetch_or(volatile a16 *a, a16 v, int mo) { in __tsan_atomic16_fetch_or()
728 a16 __tsan_atomic16_fetch_xor(volatile a16 *a, a16 v, int mo) { in __tsan_atomic16_fetch_xor()
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DMIMGInstructions.td454 R128A16:$r128, A16:$a16, TFE:$tfe, LWE:$lwe),
456 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
467 R128A16:$r128, A16:$a16, TFE:$tfe, LWE:$lwe),
469 let AsmString = opcode#" $vdata, "#AddrAsm#", $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
479 R128A16:$r128, A16:$a16, TFE:$tfe, LWE:$lwe),
481 let AsmString = opcode#" $vdata, $vaddr0, $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
492 R128A16:$r128, A16:$a16, TFE:$tfe, LWE:$lwe),
494 let AsmString = opcode#" $vdata, "#AddrAsm#", $srsrc$dmask$dim$unorm$cpol$r128$a16$tfe$lwe"
504 CPol:$cpol, R128A16:$r128, A16:$a16, TFE:$tfe),
506 let AsmString = opcode#" $vdata, "#AddrAsm#", $rsrc$dmask$dim$cpol$r128$a16$tfe"
[all …]
H A DSIInstrFormats.td407 bits<1> a16;
416 let Inst{62} = a16;
430 bits<1> a16;
443 let Inst{16} = a16;
460 bits<1> a16;
473 let Inst{6} = a16;
H A DAMDGPU.td659 def FeatureR128A16 : SubtargetFeature<"r128-a16",
662 …"Support gfx9-style A16 for 16-bit coordinates/gradients/lod/clamp/mip image operands, where a16 i…
665 def FeatureA16 : SubtargetFeature<"a16",
H A DSILoadStoreOptimizer.cpp972 AMDGPU::OpName::da, AMDGPU::OpName::r128, AMDGPU::OpName::a16}; in dmasksCanBeCombined()
H A DSIInstrInfo.td668 // SDNodes PatFrags for a16 loads and stores with 3 components.
1227 def A16 : NamedBitOperand<"a16">;
H A DSIInstrInfo.cpp5352 const MachineOperand *A16 = getNamedOperand(MI, AMDGPU::OpName::a16); in verifyInstruction()
/freebsd/sys/contrib/zlib/
H A Dgzwrite.c503 int a11, int a12, int a13, int a14, int a15, int a16, in gzprintf() argument
511 (void)a13, (void)a14, (void)a15, (void)a16, (void)a17, (void)a18, in gzprintf()
566 a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf()
572 a12, a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf()
577 a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf()
581 a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf()
/freebsd/sys/contrib/zstd/zlibWrapper/
H A Dgzwrite.c446 int a11, int a12, int a13, int a14, int a15, int a16, in gzprintf() argument
488 a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf()
494 a12, a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf()
499 a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf()
503 a9, a10, a11, a12, a13, a14, a15, a16, a17, a18, a19, a20); in gzprintf()
/freebsd/contrib/bc/tests/bc/errors/
H A D34.txt142 a16[0]
293 a16[0]
H A D11.txt132 a16[0] = 0
/freebsd/lib/msun/ld128/
H A De_lgammal_r.c52 a16 = 4.48993286185740853170657139487620560e-07L, variable
273 p1 = a0+z*(a2+z*(a4+z*(a6+z*(a8+z*(a10+z*(a12+z*(a14+z*(a16+ in lgammal_r()
/freebsd/sys/dev/psci/
H A Dsmccc.h144 register_t a16; member
/freebsd/contrib/bc/tests/bc/scripts/
H A Dafl1.bc142 a16[0]
H A Dreferences.bc132 a16[0] = 0
/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64Processors.td407 def TuneAppleA16 : SubtargetFeature<"apple-a16", "ARMProcFamily", "AppleA16",
1295 def : ProcessorModel<"apple-a16", CycloneModel, ProcessorFeatures.AppleA16,
1297 def : ProcessorAlias<"apple-m3", "apple-a16">;
1298 def : ProcessorAlias<"apple-s9", "apple-a16">;
1299 def : ProcessorAlias<"apple-s10", "apple-a16">;
/freebsd/contrib/netbsd-tests/ipf/expected/
H A Dni561 4500 003d 0010 4000 ff06 02db 0101 0101 96cb e002 8032 0015 bd6b ca12 3786 78d5 5018 269c 4a16 0000…
/freebsd/sys/contrib/device-tree/src/arm/nvidia/
H A Dtegra30-colibri.dtsi502 gmi-a16-pj7 {
H A Dtegra30-apalis.dtsi125 gmi-a16-pj7 {
H A Dtegra30-apalis-v1.1.dtsi126 gmi-a16-pj7 {
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/Disassembler/
H A DAMDGPUDisassembler.cpp1213 AMDGPU::getNamedOperandIdx(MI.getOpcode(), AMDGPU::OpName::a16); in convertMIMGInst()
/freebsd/share/vt/fonts/
H A Dgallant.hex4069 2a16:000001e003e00700060006007fe0462046204620462046204620462046207fe0060006000e007c0078000000
/freebsd/crypto/heimdal/doc/
H A Dlayman.asc1063 2a16. The encoding of 840 = 6 * 128 + 4816 is 86 48 and the
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/AsmParser/
H A DAMDGPUAsmParser.cpp4184 int A16Idx = AMDGPU::getNamedOperandIdx(Opc, AMDGPU::OpName::a16); in validateMIMGAddrSize()

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