H A D | qcom_gcc_ipq4018_clock.c | 88 #define F_FEPLL(_id, _cname, _parent, _reg, _fs, _fw, _rs, _rw) \ argument 92 .clkdef.parent_names = (const char *[]){_parent}, \ 103 #define F_FDIV(_id, _cname, _parent, _divisor) \ argument 107 .clkdef.parent_names = (const char *[]){_parent}, \ 114 #define F_APSSDIV(_id, _cname, _parent, _doffset, _dshift, _dwidth, \ argument 119 .clkdef.parent_names = (const char *[]){_parent}, \ 131 #define F_RO_DIV(_id, _cname, _parent, _offset, _shift, _width, _tbl) \ argument 135 .clkdef.parent_names = (const char *[]){_parent}, \ 164 #define F_BRANCH2(_id, _cname, _parent, _eo, _es, _hr, _hs, _haltreg, \ argument 169 .clkdef.parent_names = (const char *[]){_parent}, \
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